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Searched refs:fminv (Results 1 - 17 of 17) sorted by relevance

/third_party/node/deps/v8/src/codegen/arm64/
H A Dassembler-arm64.h1209 void fminv(const VRegister& vd, const VRegister& vn);
H A Dmacro-assembler-arm64.h278 V(fminv, Fminv) \
H A Dassembler-arm64.cc2043 V(fminv, NEON_FMINV, vd.Is1S()) \
/third_party/node/deps/v8/src/execution/arm64/
H A Dsimulator-arm64.h2166 LogicVRegister fminv(VectorFormat vform, LogicVRegister dst,
H A Dsimulator-arm64.cc4619 fminv(vf, rd, rn);
H A Dsimulator-logic-arm64.cc3650 LogicVRegister Simulator::fminv(VectorFormat vform, LogicVRegister dst, in fminv() function in v8::internal::Simulator
/third_party/vixl/src/aarch64/
H A Dassembler-aarch64.h3061 void fminv(const VRegister& vd, const VRegister& vn);
4338 void fminv(const VRegister& vd, const PRegister& pg, const ZRegister& zn);
H A Dsimulator-aarch64.cc7884 fminv(vf, rd, rn); in Simulator()
7904 fminv(vf, rd, rn); in Simulator()
10544 fn = &Simulator::fminv; in Simulator()
H A Dsimulator-aarch64.h4805 LogicVRegister fminv(VectorFormat vform,
H A Dmacro-assembler-aarch64.h3024 V(fminv, Fminv) \
4637 fminv(vd, pg, zn); in Fminv()
H A Dassembler-aarch64.cc5389 V(fminv, NEON_FMINV, NEON_FMINV_H) \
H A Dassembler-sve-aarch64.cc1386 void Assembler::fminv(const VRegister& vd, in fminv() function in vixl::aarch64::Assembler
H A Dlogic-aarch64.cc5653 LogicVRegister Simulator::fminv(VectorFormat vform,
/third_party/vixl/test/aarch64/
H A Dtest-simulator-aarch64.cc4958 DEFINE_TEST_NEON_ACROSS_FP(fminv, Basic)
H A Dtest-disasm-sve-aarch64.cc1554 COMPARE(fminv(h10, p4, z27.VnH()), "fminv h10, p4, z27.h"); in TEST()
1555 COMPARE(fminv(s10, p4, z27.VnS()), "fminv s10, p4, z27.s"); in TEST()
1556 COMPARE(fminv(d10, p4, z27.VnD()), "fminv d10, p4, z27.d"); in TEST()
H A Dtest-trace-aarch64.cc2658 __ fminv(s25, v8.V4S()); in GenerateTestSequenceNEONFP()
H A Dtest-cpu-features-aarch64.cc3278 TEST_FP_NEON(fminv_0, fminv(s0, v1.V4S()))

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