| /third_party/vixl/test/aarch64/ |
| H A D | test-cpu-features-aarch64.cc | 3114 TEST_FP_NEON(facge_0, facge(v0.V2S(), v1.V2S(), v2.V2S()))
3115 TEST_FP_NEON(facge_1, facge(v0.V4S(), v1.V4S(), v2.V4S()))
3116 TEST_FP_NEON(facge_2, facge(v0.V2D(), v1.V2D(), v2.V2D()))
3117 TEST_FP_NEON(facge_3, facge(s0, s1, s2))
3118 TEST_FP_NEON(facge_4, facge(d0, d1, d2))
3584 TEST_FP_NEON_NEONHALF(facge_0, facge(v0.V4H(), v1.V4H(), v2.V4H()))
3585 TEST_FP_NEON_NEONHALF(facge_1, facge(v0.V8H(), v1.V8H(), v2.V8H()))
3586 TEST_FP_NEON_NEONHALF(facge_2, facge(h0, h1, h2))
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| H A D | test-trace-aarch64.cc | 415 __ facge(d1, d23, d16); in GenerateTestSequenceFP()
416 __ facge(s4, s17, s1); in GenerateTestSequenceFP()
2536 __ facge(v18.V2D(), v5.V2D(), v0.V2D()); in GenerateTestSequenceNEONFP()
2537 __ facge(v15.V2S(), v11.V2S(), v6.V2S()); in GenerateTestSequenceNEONFP()
2538 __ facge(v30.V4S(), v10.V4S(), v25.V4S()); in GenerateTestSequenceNEONFP()
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| H A D | test-simulator-aarch64.cc | 4667 DEFINE_TEST_NEON_3SAME_FP(facge, Basic)
4711 DEFINE_TEST_NEON_3SAME_FP_SCALAR(facge, Basic)
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| H A D | test-disasm-sve-aarch64.cc | 1282 COMPARE(facge(p1.VnH(), p3.Zeroing(), z22.VnH(), z25.VnH()), in TEST()
1283 "facge p1.h, p3/z, z22.h, z25.h"); in TEST()
1284 COMPARE(facge(p1.VnS(), p3.Zeroing(), z22.VnS(), z25.VnS()), in TEST()
1285 "facge p1.s, p3/z, z22.s, z25.s"); in TEST()
1286 COMPARE(facge(p1.VnD(), p3.Zeroing(), z22.VnD(), z25.VnD()), in TEST()
1287 "facge p1.d, p3/z, z22.d, z25.d"); in TEST()
1326 "facge p2.h, p0/z, z15.h, z11.h"); in TEST()
1328 "facge p2.s, p0/z, z15.s, z11.s"); in TEST()
1330 "facge p2.d, p0/z, z15.d, z11.d"); in TEST()
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| /third_party/node/deps/v8/src/codegen/arm64/ |
| H A D | assembler-arm64.h | 1575 void facge(const VRegister& vd, const VRegister& vn, const VRegister& vm);
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| H A D | macro-assembler-arm64.h | 372 V(facge, Facge) \
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| H A D | assembler-arm64.cc | 3136 V(facge, NEON_FACGE, NEON_FACGE_scalar) \
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| /third_party/vixl/src/aarch64/ |
| H A D | macro-assembler-aarch64.h | 2867 V(facge, Facge) \
4305 facge(pd, pg, zn, zm); in Facge()
4321 facge(pd, pg, zm, zn); in Facle()
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| H A D | assembler-aarch64.h | 3529 void facge(const VRegister& vd, const VRegister& vn, const VRegister& vm);
4108 void facge(const PRegisterWithLaneSize& pd,
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| H A D | assembler-aarch64.cc | 4236 V(facge, NEON_FACGE, NEON_FACGE_scalar, NEON_FACGE_H_scalar) \
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| H A D | assembler-sve-aarch64.cc | 1049 void Assembler::facge(const PRegisterWithLaneSize& pd, in facge() function in vixl::aarch64::Assembler
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