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Help
Searched
refs:db_depth_info
(Results
1 - 7
of
7
) sorted by relevance
/third_party/mesa3d/src/gallium/drivers/r600/
H
A
D
r600_pipe_common.h
270
unsigned
db_depth_info
; /* R600 only, then SI and later */
member
H
A
D
r600_state.c
1069
surf->
db_depth_info
= S_028010_ARRAY_MODE(array_mode) | S_028010_FORMAT(format);
in r600_init_depth_surface()
1082
surf->
db_depth_info
|= S_028010_TILE_SURFACE_ENABLE(1);
in r600_init_depth_surface()
1465
radeon_emit(cs, surf->
db_depth_info
); /* R_028010_DB_DEPTH_INFO */
in r600_emit_framebuffer_state()
/third_party/mesa3d/src/gallium/drivers/radeonsi/
H
A
D
si_pipe.h
481
unsigned
db_depth_info
;
member
H
A
D
si_state.c
2771
surf->
db_depth_info
= 0;
in si_init_depth_surface()
2782
surf->
db_depth_info
|= S_02803C_ARRAY_MODE(G_009910_ARRAY_MODE(tile_mode)) |
in si_init_depth_surface()
3569
radeon_emit(zb->
db_depth_info
| /* DB_DEPTH_INFO */
in si_emit_framebuffer_state()
/third_party/mesa3d/src/amd/vulkan/
H
A
D
radv_private.h
1360
uint32_t
db_depth_info
;
H
A
D
radv_device.c
6665
ds->
db_depth_info
= S_02803C_ADDR5_SWIZZLE_MASK(!radv_image_is_tc_compat_htile(iview->image));
in radv_initialise_ds_surface()
6684
ds->
db_depth_info
|= S_02803C_ARRAY_MODE(G_009910_ARRAY_MODE(tile_mode)) |
in radv_initialise_ds_surface()
H
A
D
radv_cmd_buffer.c
2230
radeon_emit(cmd_buffer->cs, ds->
db_depth_info
); /* R_02803C_DB_DEPTH_INFO */
in radv_emit_fb_ds_state()
Completed in 45 milliseconds