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Searched refs:class_bits (Results 1 - 3 of 3) sorted by relevance

/third_party/mesa3d/src/gallium/drivers/vc4/
H A Dvc4_register_allocate.c254 uint8_t class_bits[c->num_temps]; in vc4_register_allocate() local
291 memset(class_bits, in vc4_register_allocate()
293 sizeof(class_bits)); in vc4_register_allocate()
304 class_bits[i] &= ~CLASS_BIT_R4; in vc4_register_allocate()
313 class_bits[inst->dst.index] &= ~CLASS_BIT_R4; in vc4_register_allocate()
319 class_bits[inst->dst.index] &= ~CLASS_BIT_R4; in vc4_register_allocate()
335 class_bits[inst->src[0].index] &= CLASS_BIT_R0_R3; in vc4_register_allocate()
344 class_bits[i] &= ~(CLASS_BIT_R0_R3 | in vc4_register_allocate()
357 class_bits[inst->dst.index] &= CLASS_BIT_A; in vc4_register_allocate()
368 class_bits[ins in vc4_register_allocate()
[all...]
/third_party/mesa3d/src/broadcom/compiler/
H A Dvir_register_allocate.c58 return nodes->info[temp_to_node(temp)].class_bits; in get_temp_class_bits()
63 uint32_t temp, uint8_t class_bits) in set_temp_class_bits()
65 nodes->info[temp_to_node(temp)].class_bits = class_bits; in set_temp_class_bits()
69 choose_reg_class(struct v3d_compile *c, uint8_t class_bits) in choose_reg_class() argument
71 if (class_bits == CLASS_BITS_PHYS) { in choose_reg_class()
73 } else if (class_bits == (CLASS_BITS_R5)) { in choose_reg_class()
75 } else if (class_bits == (CLASS_BITS_PHYS | CLASS_BITS_ACC)) { in choose_reg_class()
78 assert(class_bits == CLASS_BITS_ANY); in choose_reg_class()
340 add_node(struct v3d_compile *c, uint32_t temp, uint8_t class_bits) in add_node() argument
62 set_temp_class_bits(struct v3d_ra_node_info *nodes, uint32_t temp, uint8_t class_bits) set_temp_class_bits() argument
510 uint8_t class_bits = get_temp_class_bits(&c->nodes, v3d_emit_tmu_spill() local
1043 uint8_t class_bits = update_graph_and_reg_classes_for_inst() local
[all...]
H A Dv3d_compiler.h607 uint8_t class_bits;

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