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Searched refs:cacheline (Results 1 - 4 of 4) sorted by relevance

/third_party/mesa3d/src/util/
H A Du_cpu_detect.c678 /* Make the fallback cacheline size nonzero so that it can be in util_cpu_detect_once()
681 util_cpu_caps.cacheline = sizeof(void *); in util_cpu_detect_once()
688 util_cpu_caps.cacheline = 32; in util_cpu_detect_once()
694 unsigned int cacheline; in util_cpu_detect_once() local
741 cacheline = ((regs2[1] >> 8) & 0xFF) * 8; in util_cpu_detect_once()
742 if (cacheline > 0) in util_cpu_detect_once()
743 util_cpu_caps.cacheline = cacheline; in util_cpu_detect_once()
790 unsigned int cacheline; in util_cpu_detect_once() local
792 cacheline in util_cpu_detect_once()
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H A Du_cpu_detect.h91 unsigned cacheline; member
/third_party/ffmpeg/libavcodec/arm/
H A Dstartcode_armv6.S99 4: @ Get to cacheline (8-word) alignment
113 @ Preload trailing part-cacheline, if any
/third_party/mesa3d/src/gallium/drivers/llvmpipe/
H A Dlp_texture.c89 * resources. Otherwise we'd want the max of cacheline size and 16 (max size in llvmpipe_texture_layout()
93 unsigned mip_align = MAX2(64, util_get_cpu_caps()->cacheline); in llvmpipe_texture_layout()
131 lpr->row_stride[level] = align(nblocksx * block_size, util_get_cpu_caps()->cacheline); in llvmpipe_texture_layout()

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