| /third_party/skia/third_party/externals/freetype/builds/cmake/ |
| H A D | testbuild.sh | 45 bsl=-DBUILD_SHARED_LIBS=$BUILD_SHARED_LIBS
47 bsl=-UBUILD_SHARED_LIBS
54 $bsl \
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| /third_party/ffmpeg/libavcodec/aarch64/ |
| H A D | vc1dsp_neon.S | 758 bsl v19.8b, v7.8b, v2.8b // a3
768 bsl v5.8b, v4.8b, v0.8b // FFMIN(d, clip)
829 bsl v19.8b, v16.8b, v3.8b // a3
839 bsl v5.8b, v6.8b, v0.8b // FFMIN(d, clip)
902 bsl v18.16b, v16.16b, v3.16b // a3
917 bsl v3.16b, v17.16b, v0.16b // FFMIN(d, clip)
1004 bsl v18.16b, v17.16b, v7.16b // a3
1017 bsl v5.16b, v1.16b, v0.16b // FFMIN(d, clip)
1113 bsl v5.16b, v16.16b, v17.16b // a3[0..7]
1118 bsl v1
[all...] |
| H A D | h264dsp_neon.S | 92 bsl v17.16B, v23.16B, v18.16B
93 bsl v19.16B, v28.16B, v2.16B
|
| /third_party/node/deps/v8/src/codegen/arm64/ |
| H A D | assembler-arm64.h | 491 void bsl(const VRegister& vd, const VRegister& vn, const VRegister& vm);
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| H A D | macro-assembler-arm64.h | 363 V(bsl, Bsl) \
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| H A D | assembler-arm64.cc | 3101 V(bsl, NEON_BSL, vd.Is8B() || vd.Is16B()) \
|
| /third_party/vixl/src/aarch64/ |
| H A D | macro-assembler-sve-aarch64.cc | 1821 V(Bsl, bsl, FourRegDestructiveHelper) \
|
| H A D | simulator-aarch64.cc | 3352 bsl(vform, zdn, zk, temp, zm); in Simulator()
3356 bsl(vform, zdn, zk, zdn, temp); in Simulator()
3359 bsl(vform, zdn, zk, zdn, zm); in Simulator()
3366 bsl(vform, zdn, zk, zdn, zm); in Simulator()
7360 bsl(vf, rd, rd, rn, rm); in Simulator()
|
| H A D | assembler-aarch64.h | 2764 void bsl(const VRegister& vd, const VRegister& vn, const VRegister& vm);
5940 void bsl(const ZRegister& zd,
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| H A D | simulator-aarch64.h | 3631 LogicVRegister bsl(VectorFormat vform,
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| H A D | assembler-aarch64.cc | 4205 V(bsl, NEON_BSL, vd.Is8B() || vd.Is16B()) \
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| H A D | assembler-sve-aarch64.cc | 6756 void Assembler::bsl(const ZRegister& zd, in bsl() function in vixl::aarch64::Assembler
|
| H A D | logic-aarch64.cc | 1136 LogicVRegister Simulator::bsl(VectorFormat vform, in bsl() function in vixl::aarch64::Simulator
|
| H A D | macro-assembler-aarch64.h | 2858 V(bsl, Bsl) \
|
| /third_party/vixl/test/aarch64/ |
| H A D | test-api-movprfx-aarch64.cc | 1986 __ bsl(z21.VnD(), z21.VnD(), z2.VnD(), z2.VnD()); in TEST()
2850 __ bsl(z21.VnD(), z21.VnD(), z2.VnD(), z2.VnD()); in TEST()
3176 __ bsl(z21.VnD(), z21.VnD(), z2.VnD(), z21.VnD()); in TEST()
|
| H A D | test-simulator-aarch64.cc | 4671 DEFINE_TEST_NEON_3SAME_8B_16B(bsl, Basic)
|
| H A D | test-trace-aarch64.cc | 672 __ bsl(v9.V16B(), v31.V16B(), v23.V16B()); in GenerateTestSequenceNEON()
673 __ bsl(v14.V8B(), v7.V8B(), v3.V8B()); in GenerateTestSequenceNEON()
|
| H A D | test-cpu-features-aarch64.cc | 803 TEST_NEON(bsl_0, bsl(v0.V8B(), v1.V8B(), v2.V8B()))
804 TEST_NEON(bsl_1, bsl(v0.V16B(), v1.V16B(), v2.V16B()))
|
| /third_party/node/deps/v8/src/execution/arm64/ |
| H A D | simulator-arm64.h | 1708 LogicVRegister bsl(VectorFormat vform, LogicVRegister dst,
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| H A D | simulator-arm64.cc | 4206 bsl(vf, rd, rn, rm);
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| H A D | simulator-logic-arm64.cc | 1080 LogicVRegister Simulator::bsl(VectorFormat vform, LogicVRegister dst, in bsl() function in v8::internal::Simulator
|