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Searched refs:andv (Results 1 - 7 of 7) sorted by relevance

/third_party/vixl/test/aarch64/
H A Dtest-disasm-sve-aarch64.cc2902 COMPARE(andv(b15, p1, z4.VnB()), "andv b15, p1, z4.b"); in TEST()
2903 COMPARE(andv(h14, p2, z3.VnH()), "andv h14, p2, z3.h"); in TEST()
2904 COMPARE(andv(s13, p3, z2.VnS()), "andv s13, p3, z2.s"); in TEST()
2905 COMPARE(andv(d12, p4, z1.VnD()), "andv d12, p4, z1.d"); in TEST()
/third_party/vixl/src/aarch64/
H A Dsimulator-aarch64.h4743 LogicVRegister andv(VectorFormat vform,
H A Dassembler-aarch64.h3697 void andv(const VRegister& vd, const PRegister& pg, const ZRegister& zn);
H A Dassembler-sve-aarch64.cc3255 void Assembler::andv(const VRegister& vd, in andv() function in vixl::aarch64::Assembler
H A Dlogic-aarch64.cc2102 LogicVRegister Simulator::andv(VectorFormat vform,
H A Dmacro-assembler-aarch64.h3706 andv(vd, pg, zn); in Andv()
H A Dsimulator-aarch64.cc11660 andv(vform, vd, pg, zn); in Simulator()

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