Searched refs:Z7 (Results 1 - 8 of 8) sorted by relevance
| /third_party/ffmpeg/libavcodec/aarch64/ |
| H A D | simple_idct_neon.S | 35 #define Z7 4520 //cos(i*M_PI/16)*sqrt(2)*(1<<14) + 0.5 define
50 .short Z1, Z2, Z3, Z4, Z5, Z6, Z7, Z4c
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| /third_party/mesa3d/src/amd/addrlib/src/gfx11/ |
| H A D | gfx11SwizzlePattern.h | 2082 {Y2^X7^Z7, X3^Y6^Z6, Z3^Y5^X6, Y3^X5^Z5, }, // 271
2083 {Y2^X6^Z7, X2^Y6^Z6, Z3^X5^Y5, Y3^X4^Z5, }, // 272
2087 {Y2^X8^Z8, X3^Y7^Z7, Z3^Y6^X7, Y3^X6^Z6, }, // 276
2088 {Y2^X7^Z8, X2^Y7^Z7, Z3^X6^Y6, Y3^X5^Z6, }, // 277
2089 {Y2^X7^Z7, X2^Z6^Y7, Z2^X6^Y6, Y3^X5^Z5, }, // 278
2090 {Y1^X7^Z7, X2^Y6^Z6, Z2^Y5^X6, Y2^X5^Z5, }, // 279
2091 {Y1^X6^Z7, X1^Y6^Z6, Z2^X5^Y5, Y2^X4^Z5, }, // 280
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| /third_party/mesa3d/src/amd/addrlib/src/core/ |
| H A D | addrlib2.h | 205 const UINT_64 Z7 = InitBit(2, 7); member
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/MCTargetDesc/ |
| H A D | AArch64InstPrinter.cpp | 1206 case AArch64::Z6: Reg = AArch64::Z7; break; in getNextVectorRegister()
1207 case AArch64::Z7: Reg = AArch64::Z8; break; in getNextVectorRegister()
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| /third_party/mesa3d/src/amd/addrlib/src/gfx10/ |
| H A D | gfx10SwizzlePattern.h | 3944 {Y2^X7^Z7, X3^Y6^Z6, Z3^Y5^X6, Y3^X5^Z5, }, // 156
3945 {Y2^X6^Z7, X2^Y6^Z6, Z3^X5^Y5, Y3^X4^Z5, }, // 157
3949 {Y2^X8^Z8, X3^Y7^Z7, Z3^Y6^X7, Y3^X6^Z6, }, // 161
3950 {Y2^X7^Z8, X2^Y7^Z7, Z3^X6^Y6, Y3^X5^Z6, }, // 162
3951 {Y2^X7^Z7, X2^Z6^Y7, Z2^X6^Y6, Y3^X5^Z5, }, // 163
3952 {Y1^X7^Z7, X2^Y6^Z6, Z2^Y5^X6, Y2^X5^Z5, }, // 164
3953 {Y1^X6^Z7, X1^Y6^Z6, Z2^X5^Y5, Y2^X4^Z5, }, // 165
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/Disassembler/ |
| H A D | AArch64Disassembler.cpp | 496 AArch64::Z4, AArch64::Z5, AArch64::Z6, AArch64::Z7,
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| /third_party/ffmpeg/ |
| H A D | configure | 4584 -g) echo -Z7 ;;
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/AsmParser/ |
| H A D | AArch64AsmParser.cpp | 2195 .Case("z7", AArch64::Z7) in matchSVEDataVectorRegName()
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