Home
last modified time | relevance | path

Searched refs:VisitSVEBitwiseLogicalUnpredicated (Results 1 - 3 of 3) sorted by relevance

/third_party/vixl/src/aarch64/
H A Ddecoder-visitor-map-aarch64.h53 {"and_z_zz"_h, &VISITORCLASS::VisitSVEBitwiseLogicalUnpredicated}, \
67 {"bic_z_zz"_h, &VISITORCLASS::VisitSVEBitwiseLogicalUnpredicated}, \
154 {"eor_z_zz"_h, &VISITORCLASS::VisitSVEBitwiseLogicalUnpredicated}, \
764 {"orr_z_zz"_h, &VISITORCLASS::VisitSVEBitwiseLogicalUnpredicated}, \
H A Ddisasm-aarch64.cc5067 void Disassembler::VisitSVEBitwiseLogicalUnpredicated( in Disassembler() function in vixl::aarch64::Disassembler
H A Dsimulator-aarch64.cc9708 void Simulator::VisitSVEBitwiseLogicalUnpredicated(const Instruction* instr) { in Simulator() function in vixl::aarch64::Simulator

Completed in 49 milliseconds