/third_party/vixl/test/aarch64/ |
H A D | test-disasm-aarch64.cc | 3323 COMPARE_MACRO(Umin(w11, w8, w17), "umin w11, w8, w17"); in TEST() 3324 COMPARE_MACRO(Umin(x12, x10, x20), "umin x12, x10, x20"); in TEST() 3332 COMPARE_MACRO(Umin(wzr, w20, 1), "umin wzr, w20, #1"); in TEST() 3333 COMPARE_MACRO(Umin(x30, xzr, 0), "umin x30, xzr, #0"); in TEST() 3353 COMPARE_MACRO(Umin(w5, w6, 256), in TEST() 3356 COMPARE_MACRO(Umin(x10, x11, 0x4242), in TEST()
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H A D | test-assembler-neon-aarch64.cc | 6611 __ Umin(v16.V8B(), v0.V8B(), v1.V8B()); in TEST() 6612 __ Umin(v18.V4H(), v0.V4H(), v1.V4H()); in TEST() 6613 __ Umin(v20.V2S(), v0.V2S(), v1.V2S()); in TEST() 6615 __ Umin(v17.V16B(), v0.V16B(), v1.V16B()); in TEST() 6616 __ Umin(v19.V8H(), v0.V8H(), v1.V8H()); in TEST() 6617 __ Umin(v21.V4S(), v0.V4S(), v1.V4S()); in TEST()
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H A D | test-disasm-sve-aarch64.cc | 2483 COMPARE_MACRO(Umin(z26.VnB(), p5.Merging(), z26.VnB(), z12.VnB()), in TEST() 2485 COMPARE_MACRO(Umin(z26.VnH(), p5.Merging(), z27.VnH(), z26.VnH()), in TEST() 2487 COMPARE_MACRO(Umin(z26.VnD(), p5.Merging(), z13.VnD(), z12.VnD()), in TEST() 3276 COMPARE_MACRO(Umin(z13.VnD(), z25.VnD(), 119), in TEST() 3336 COMPARE_MACRO(Umin(z25.VnD(), z25.VnD(), 123123123), in TEST()
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H A D | test-disasm-neon-aarch64.cc | 1556 COMPARE_MACRO(Umin(v3.M, v4.M, v5.M), "umin v3." S ", v4." S ", v5." S); in TEST()
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H A D | test-assembler-sve-aarch64.cc | 4663 fn = &MacroAssembler::Umin; 10923 IntWideImmFn fn = &MacroAssembler::Umin;
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/third_party/vixl/src/aarch64/ |
H A D | macro-assembler-sve-aarch64.cc | 168 void MacroAssembler::Umin(const ZRegister& zd, in Umin() function in vixl::aarch64::MacroAssembler 174 SVEArithPredicatedFn reg_fn = &MacroAssembler::Umin; in Umin()
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H A D | macro-assembler-aarch64.h | 2962 V(umin, Umin) \ 3236 V(umin, Umin) \ 6290 void Umin(const ZRegister& zd, const ZRegister& zn, IntegerOperand imm); 7928 void Umin(const Register& rd, const Register& rn, const Operand& op);
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H A D | macro-assembler-aarch64.cc | 1514 V(Umin, umin, IsUint8) in Emit()
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/third_party/node/deps/v8/src/wasm/baseline/arm64/ |
H A D | liftoff-assembler-arm64.h | 2304 Umin(dst.fp().V4S(), lhs.fp().V4S(), rhs.fp().V4S()); in emit_i32x4_min_u() 2504 Umin(dst.fp().V8H(), lhs.fp().V8H(), rhs.fp().V8H()); in emit_i16x8_min_u() 2707 Umin(dst.fp().V16B(), lhs.fp().V16B(), rhs.fp().V16B()); in emit_i8x16_bitmask()
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/third_party/node/deps/v8/src/codegen/arm64/ |
H A D | macro-assembler-arm64.h | 461 V(umin, Umin) \
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/third_party/node/deps/v8/src/compiler/backend/arm64/ |
H A D | code-generator-arm64.cc | 2175 SIMD_BINOP_LANE_SIZE_CASE(kArm64IMinU, Umin); in AssembleArchInstruction()
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