| /third_party/node/deps/v8/src/baseline/mips/ |
| H A D | baseline-compiler-mips-inl.h | 45 __ masm()->Sw(kInterpreterAccumulatorRegister, MemOperand(sp, i * 4)); in PrologueFillFrame()
55 __ masm()->Sw(kInterpreterAccumulatorRegister, MemOperand(sp, i * 4)); in PrologueFillFrame()
60 __ masm()->Sw(kInterpreterAccumulatorRegister, MemOperand(sp, i * 4)); in PrologueFillFrame()
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| H A D | baseline-assembler-mips-inl.h | 224 __ Sw(source, output); in Move()
378 __ Sw(scratch, FieldMemOperand(target, offset)); in StoreTaggedSignedField()
384 __ Sw(value, FieldMemOperand(target, offset)); in StoreTaggedFieldWithWriteBarrier()
393 __ Sw(value, FieldMemOperand(target, offset)); in StoreTaggedFieldNoWriteBarrier()
409 __ Sw(interrupt_budget, in AddToInterruptBudgetAndJumpIfNotExceeded()
429 __ Sw(interrupt_budget, in AddToInterruptBudgetAndJumpIfNotExceeded()
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| /third_party/node/deps/v8/src/baseline/riscv64/ |
| H A D | baseline-assembler-riscv64-inl.h | 398 __ Sw(interrupt_budget, in AddToInterruptBudgetAndJumpIfNotExceeded()
420 __ Sw(interrupt_budget, in AddToInterruptBudgetAndJumpIfNotExceeded()
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| /third_party/node/deps/v8/src/baseline/mips64/ |
| H A D | baseline-assembler-mips64-inl.h | 407 __ Sw(interrupt_budget, in AddToInterruptBudgetAndJumpIfNotExceeded()
427 __ Sw(interrupt_budget, in AddToInterruptBudgetAndJumpIfNotExceeded()
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| /third_party/node/deps/v8/src/regexp/mips/ |
| H A D | regexp-macro-assembler-mips.cc | 158 __ Sw(a0, MemOperand(frame_pointer(), kBacktrackCount)); in Backtrack()
635 __ Sw(src, MemOperand(scratch)); in StoreRegExpStackPointerToMemory()
645 __ Sw(scratch, MemOperand(frame_pointer(), kRegExpStackBasePointer)); in PushRegExpBasePointer()
1079 __ Sw(a0, register_location(reg)); in WriteStackPointerToRegister()
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| /third_party/node/deps/v8/src/regexp/riscv64/ |
| H A D | regexp-macro-assembler-riscv64.cc | 864 __ Sw(a2, MemOperand(a0)); in GetCode()
866 __ Sw(a3, MemOperand(a0)); in GetCode()
1093 __ Sw(a0, register_location(reg)); in WriteStackPointerToRegister()
1297 __ Sw(source, MemOperand(backtrack_stackpointer()));
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| /third_party/node/deps/v8/src/builtins/mips/ |
| H A D | builtins-mips.cc | 423 __ Sw(zero_reg, MemOperand(t4)); in Generate_JSEntryVariant()
1099 __ Sw(invocation_count, in Generate_BaselineOutOfLinePrologue()
1375 __ Sw(kInterpreterBytecodeOffsetRegister, in Generate_InterpreterEntryTrampoline()
1389 __ Sw(a2, MemOperand(fp, InterpreterFrameConstants::kBytecodeOffsetFromFp)); in Generate_InterpreterEntryTrampoline()
1734 __ Sw(scratch, MemOperand(t0)); in Generate_ContinueToBuiltinHelper()
2093 __ Sw(kScratchReg, MemOperand(t4, 0)); in Generate_CallOrConstructVarargs()
2170 __ Sw(kScratchReg, MemOperand(t0)); in Generate_CallOrConstructForwardVarargs()
2840 __ Sw(zero_reg, MemOperand(scratch)); in Generate_CEntry()
4100 __ Sw(feedback_vector, in Generate_BaselineOrInterpreterEntry()
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| /third_party/node/deps/v8/src/regexp/mips64/ |
| H A D | regexp-macro-assembler-mips64.cc | 874 __ Sw(a2, MemOperand(a0)); in GetCode()
876 __ Sw(a3, MemOperand(a0)); in GetCode()
1339 __ Sw(source, MemOperand(backtrack_stackpointer()));
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| /third_party/node/deps/v8/src/builtins/mips64/ |
| H A D | builtins-mips64.cc | 1060 __ Sw(zero_reg, in ResetBytecodeAgeAndOsrState()
1107 __ Sw(invocation_count, in Generate_BaselineOutOfLinePrologue()
1272 __ Sw(a4, FieldMemOperand(feedback_vector, in Generate_InterpreterEntryTrampoline()
3111 __ Sw(s2, MemOperand(s5, kLevelOffset)); in CallApiFunctionAndReturn()
3133 __ Sw(s2, MemOperand(s5, kLevelOffset)); in CallApiFunctionAndReturn()
3275 __ Sw(argc, MemOperand(sp, 3 * kPointerSize)); in Generate_CallApiCallback()
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| /third_party/node/deps/v8/src/builtins/riscv64/ |
| H A D | builtins-riscv64.cc | 1122 __ Sw(zero_reg, in ResetBytecodeAgeAndOsrState()
1164 __ Sw(invocation_count, in Generate_BaselineOutOfLinePrologue()
1336 __ Sw(a4, FieldMemOperand(feedback_vector, in Generate_InterpreterEntryTrampoline()
3175 __ Sw(s2, MemOperand(s5, kLevelOffset)); in CallApiFunctionAndReturn()
3198 __ Sw(s2, MemOperand(s5, kLevelOffset)); in CallApiFunctionAndReturn()
3341 __ Sw(argc, MemOperand(sp, 3 * kSystemPointerSize)); in Generate_CallApiCallback()
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| /third_party/node/deps/v8/src/wasm/baseline/mips64/ |
| H A D | liftoff-assembler-mips64.h | 694 Sw(src.gp(), dst_op); in AtomicStore()
979 Sw(reg.gp(), dst); in Spill()
1008 Sw(tmp.gp(), dst); in Spill()
1068 Sw(zero_reg, liftoff::GetStackSlot(start + remainder)); in FillStackSlotsWithZero()
3627 Sw(dst, MemOperand(dst)); in emit_set_if_nan()
3645 Sw(tmp_gp, MemOperand(dst)); in emit_s128_set_if_nan()
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| /third_party/node/deps/v8/src/wasm/baseline/riscv64/ |
| H A D | liftoff-assembler-riscv64.h | 126 assm->Sw(src.gp(), dst); in Store()
149 assm->Sw(reg.gp(), MemOperand(sp, 0)); in push()
613 TurboAssembler::Sw(src.gp(), dst_op); in Store()
993 Sw(reg.gp(), dst); in Spill()
1028 Sw(tmp.gp(), dst); in Spill()
1094 Sw(zero_reg, liftoff::GetStackSlot(start + remainder)); in FillStackSlotsWithZero()
1719 Sw(scratch, MemOperand(dst.gp(), offset)); in IncrementSmi()
1866 Sw(kScratchReg, dst_op); in StoreLane()
3623 Sw(kScratchReg, MemOperand(dst)); in emit_s128_set_if_nan()
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| /third_party/node/deps/v8/src/wasm/baseline/mips/ |
| H A D | liftoff-assembler-mips.h | 336 Sw(scratch, MemOperand(fp, (i - stack_param_delta) * 4)); in PrepareTailCall()
527 Sw(src.gp(), dst_op); in StoreTaggedPointer()
900 Sw(zero_reg, liftoff::GetStackSlot(start + offset)); in FillStackSlotsWithZero()
911 Sw(zero_reg, MemOperand(a0)); in FillStackSlotsWithZero()
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| /third_party/node/deps/v8/src/compiler/backend/mips64/ |
| H A D | code-generator-mips64.cc | 1654 __ Sw(i.InputOrZeroRegister(2), i.MemoryOperand()); in AssembleArchInstruction()
1901 ASSEMBLE_ATOMIC_STORE_INTEGER(Sw); in AssembleArchInstruction()
4590 __ Sw(temp_0, dst0); in AssembleConstructFrame()
4592 __ Sw(temp_0, dst1); in AssembleConstructFrame()
4594 __ Sw(temp_0, dst2); in AssembleConstructFrame()
4596 __ Sw(temp_0, dst3); in AssembleConstructFrame()
4602 __ Sw(temp_0, dst0); in AssembleConstructFrame()
4604 __ Sw(temp_0, dst1); in AssembleConstructFrame()
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| /third_party/node/deps/v8/src/codegen/mips/ |
| H A D | macro-assembler-mips.h | 277 void Sw(Register rd, const MemOperand& rs);
927 Sw(rec, MemOperand(sp, 0)); in StoreReceiver()
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| H A D | macro-assembler-mips.cc | 1278 void TurboAssembler::Sw(Register rd, const MemOperand& rs) { in CallRecordWriteStub() function in v8::internal::TurboAssembler
4377 Sw(t1, MemOperand(dest, 0)); in CallRecordWriteStub()
4389 Sw(t0, MemOperand(t4, 0)); in CallRecordWriteStub()
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| /third_party/skia/third_party/externals/swiftshader/third_party/subzero/src/ |
| H A D | IceInstMIPS32.h | 277 Sw, enumerator
1280 using InstMIPS32Sw = InstMIPS32Store<InstMIPS32::Sw>;
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| /third_party/node/deps/v8/src/codegen/mips64/ |
| H A D | macro-assembler-mips64.cc | 1164 Sw(rd, rs); in CallRecordWriteStub()
1327 Sw(rd, rs); in CallRecordWriteStub()
1329 Sw(scratch, MemOperand(rs.rm(), rs.offset() + kPointerSize / 2)); in CallRecordWriteStub()
1426 void TurboAssembler::Sw(Register rd, const MemOperand& rs) { in CallRecordWriteStub() function in v8::internal::TurboAssembler
2659 Sw(scratch, dst); in CallRecordWriteStub()
5233 Sw(scratch1, MemOperand(scratch2)); in CallRecordWriteStub()
5249 Sw(scratch1, MemOperand(scratch2)); in CallRecordWriteStub()
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| H A D | macro-assembler-mips64.h | 552 // Sw(a4, CFunctionArgumentOperand(5));
663 void Sw(Register rd, const MemOperand& rs);
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| /third_party/node/deps/v8/src/codegen/riscv64/ |
| H A D | macro-assembler-riscv64.cc | 1315 Sw(rd, rs); in StoreWordPair()
1317 Sw(scratch, MemOperand(rs.rm(), rs.offset() + kSystemPointerSize / 2)); in StoreWordPair()
1410 void TurboAssembler::Sw(Register rd, const MemOperand& rs) { in Sw() function in v8::internal::TurboAssembler
4038 Sw(kScratchReg, dst); in StoreLane()
4212 Sw(scratch1, MemOperand(scratch2)); in EmitIncrementCounter()
4228 Sw(scratch1, MemOperand(scratch2)); in EmitDecrementCounter()
5089 Sw(value, dst_field_operand); in StoreTaggedField()
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| H A D | macro-assembler-riscv64.h | 661 void Sw(Register rd, const MemOperand& rs);
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| /third_party/node/deps/v8/src/compiler/backend/riscv64/ |
| H A D | code-generator-riscv64.cc | 1623 __ Sw(i.InputOrZeroRegister(2), i.MemoryOperand()); in AssembleArchInstruction()
1777 ASSEMBLE_ATOMIC_STORE_INTEGER(Sw); in AssembleArchInstruction()
4171 __ Sw(zero_reg, dst); in AssembleMove()
4174 __ Sw(kScratchReg, dst); in AssembleMove()
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