Home
last modified time | relevance | path

Searched refs:SltuLatency (Results 1 - 3 of 3) sorted by relevance

/third_party/node/deps/v8/src/compiler/backend/riscv64/
H A Dinstruction-scheduler-riscv64.cc886 int SltuLatency(bool is_operand_register = true) { in SltuLatency() function
895 return SltuLatency() + 2; // Estimated max. in BranchShortHelperLatency()
1014 latency += SltuLatency() + 7; in TruncLSLatency()
1022 latency += SltuLatency() + 7; in TruncLDLatency()
1032 Latency::MOV_S + SltuLatency() + 4; in TruncUlSLatency()
1040 Latency::MOV_D + SltuLatency() + 4; in TruncUlDLatency()
/third_party/node/deps/v8/src/compiler/backend/mips64/
H A Dinstruction-scheduler-mips64.cc1001 int SltuLatency(bool is_operand_register = true) { in SltuLatency() function
1014 return SltuLatency() + 2; // Estimated max. in BranchShortHelperLatency()
1179 latency += SltuLatency() + 7; in TruncLSLatency()
1187 latency += SltuLatency() + 7; in TruncLDLatency()
1197 SltuLatency() + 4; in TruncUlSLatency()
1205 SltuLatency() + 4; in TruncUlDLatency()
/third_party/node/deps/v8/src/compiler/backend/mips/
H A Dinstruction-scheduler-mips.cc677 int SltuLatency(bool is_operand_register = true) { in SltuLatency() function
683 int SubPairLatency() { return SltuLatency() + 3 * SubuLatency(); } in SubPairLatency()

Completed in 6 milliseconds