| /third_party/ltp/tools/sparse/sparse-src/validation/optim/ |
| H A D | canonical-cmpe-minmax.c | 1 #define SMAX __INT_MAX__ macro
4 int le_smax(int a) { return (a <= (SMAX - 1)) == (a != SMAX); } in le_smax()
5 int gt_smax(int a) { return (a > (SMAX - 1)) == (a == SMAX); } in gt_smax()
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| H A D | canonical-cmps-minmax.c | 1 #define SMAX __INT_MAX__ macro
4 int lt_smax(int a) { return (a < SMAX) == (a != SMAX); } in lt_smax()
5 int ge_smax(int a) { return (a >= SMAX) == (a == SMAX); } in ge_smax()
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| H A D | cmps-minmax.c | 1 #define SMAX __INT_MAX__ macro
5 int le_smax(int a) { return (a <= SMAX) + 0; } in le_smax()
8 int gt_smax(int a) { return (a > SMAX) + 1; } in gt_smax()
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| /third_party/skia/third_party/externals/libwebp/src/utils/ |
| H A D | filters_utils.c | 21 #define SMAX 16 macro
22 #define SDIFF(a, b) (abs((a) - (b)) >> 4) // Scoring diff, in [0..SMAX)
32 int bins[WEBP_FILTER_LAST][SMAX]; in WebPEstimateBestFilter()
59 for (i = 0; i < SMAX; ++i) { in WebPEstimateBestFilter()
73 #undef SMAX macro
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/ |
| H A D | ISDOpcodes.h | 445 SMIN, SMAX, UMIN, UMAX, enumerator
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| H A D | TargetLowering.h | 2240 case ISD::SMAX:
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| /third_party/backends/backend/ |
| H A D | dc25.c | 723 #define SMAX (256 * SCALE - 1) macro
925 int r_min = SMAX, g_min = SMAX, b_min = SMAX; in adjust_color_and_saturation()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | SelectionDAGDumper.cpp | 267 case ISD::SMAX: return "smax"; in getOperationName()
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| H A D | SelectionDAG.cpp | 3365 case ISD::SMAX: {
3368 bool IsMax = (Opcode == ISD::SMAX);
3371 if (Op.getOperand(0).getOpcode() == (IsMax ? ISD::SMIN : ISD::SMAX))
3698 case ISD::SMAX: {
3701 bool IsMax = (Opcode == ISD::SMAX);
3704 if (Op.getOperand(0).getOpcode() == (IsMax ? ISD::SMIN : ISD::SMAX))
4803 case ISD::SMAX: return C1.sge(C2) ? C1 : C2;
5200 case ISD::SMAX:
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| H A D | LegalizeIntegerTypes.cpp | 82 case ISD::SMAX: Res = PromoteIntRes_SExtIntBinOp(N); break; in PromoteIntegerResult()
741 Result = DAG.getNode(ISD::SMAX, dl, PromotedType, Result, SatMin); in PromoteIntRes_ADDSUBSAT()
1879 case ISD::SMAX: in ExpandIntegerResult()
2208 case ISD::SMAX: in getExpandedMinMaxOps()
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| H A D | LegalizeVectorTypes.cpp | 121 case ISD::SMAX: in ScalarizeVectorResult()
932 case ISD::SMAX: in SplitVectorResult()
2077 case ISD::VECREDUCE_SMAX: CombineOpc = ISD::SMAX; break; in SplitVecOp_VECREDUCE()
2724 case ISD::SMAX: in WidenVectorResult()
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| H A D | LegalizeVectorOps.cpp | 443 case ISD::SMAX: in LegalizeOp()
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| H A D | LegalizeDAG.cpp | 3168 case ISD::SMAX:
3175 case ISD::SMAX: Pred = ISD::SETGT; break;
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| H A D | TargetLowering.cpp | 7618 case ISD::VECREDUCE_SMAX: BaseOpcode = ISD::SMAX; break;
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| H A D | DAGCombiner.cpp | 1533 case ISD::SMAX: in visit()
4337 // Is sign bits are zero, flip between UMIN/UMAX and SMIN/SMAX. in visitIMINMAX()
4346 case ISD::SMAX: AltOpcode = ISD::UMAX; break; in visitIMINMAX()
4348 case ISD::UMAX: AltOpcode = ISD::SMAX; break; in visitIMINMAX()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARC/ |
| H A D | ARCISelLowering.cpp | 97 setOperationAction(ISD::SMAX, MVT::i32, Legal); in ARCTargetLowering()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| H A D | SIISelLowering.cpp | 450 setOperationAction(ISD::SMAX, MVT::i16, Legal); in SITargetLowering()
622 setOperationAction(ISD::SMAX, MVT::v2i16, Legal); in SITargetLowering()
648 setOperationAction(ISD::SMAX, MVT::v4i16, Custom); in SITargetLowering()
728 setTargetDAGCombine(ISD::SMAX); in SITargetLowering()
4096 case ISD::SMAX: in LowerOperation()
9023 case ISD::SMAX: in minMaxOpcToMin3Max3Opc()
9186 if (Opc == ISD::SMIN && Op0.getOpcode() == ISD::SMAX && Op0.hasOneUse()) { in performMinMaxCombine()
9318 case ISD::SMAX: in performExtractVectorEltCombine()
10007 case ISD::SMAX: in PerformDAGCombine()
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| H A D | AMDGPUISelLowering.cpp | 348 setOperationAction(ISD::SMAX, MVT::i32, Legal); in AMDGPUTargetLowering()
2670 SDValue B = DAG.getNode(ISD::SMAX, DL, MVT::i32, OneSubExp, Zero); in LowerFP_TO_FP16()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/ |
| H A D | MipsSEISelLowering.cpp | 345 setOperationAction(ISD::SMAX, Ty, Legal); in addMSAIntType()
2010 return DAG.getNode(ISD::SMAX, DL, Op->getValueType(0), in lowerINTRINSIC_WO_CHAIN()
2022 return DAG.getNode(ISD::SMAX, DL, Op->getValueType(0), in lowerINTRINSIC_WO_CHAIN()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/ |
| H A D | TargetLoweringBase.cpp | 647 setOperationAction(ISD::SMAX, VT, Expand); in initActions()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyISelLowering.cpp | 186 for (auto Op : {ISD::SMIN, ISD::SMAX, ISD::UMIN, ISD::UMAX}) in WebAssemblyTargetLowering()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 903 setOperationAction(ISD::SMAX, VT, VT == MVT::v8i16 ? Legal : Custom); in X86TargetLowering()
1083 setOperationAction(ISD::SMAX, MVT::v16i8, Legal); in X86TargetLowering()
1084 setOperationAction(ISD::SMAX, MVT::v4i32, Legal); in X86TargetLowering()
1284 setOperationAction(ISD::SMAX, MVT::v4i64, Custom); in X86TargetLowering()
1300 setOperationAction(ISD::SMAX, VT, HasInt256 ? Legal : Custom); in X86TargetLowering()
1559 setOperationAction(ISD::SMAX, VT, Legal); in X86TargetLowering()
1671 setOperationAction(ISD::SMAX, VT, Legal); in X86TargetLowering()
1816 setOperationAction(ISD::SMAX, VT, Legal); in X86TargetLowering()
[all...] |
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 191 setOperationAction(ISD::SMAX, VT, Legal); in AArch64TargetLowering()
928 for (unsigned Opcode : {ISD::SMIN, ISD::SMAX, ISD::UMIN, ISD::UMAX}) in addTypeForNEON()
2966 return DAG.getNode(ISD::SMAX, dl, Op.getValueType(), in LowerINTRINSIC_WO_CHAIN()
12953 ReplaceReductionResults(N, Results, DAG, ISD::SMAX, AArch64ISD::SMAXV); in ReplaceNodeResults()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/NVPTX/ |
| H A D | NVPTXISelLowering.cpp | 498 setOperationAction(ISD::SMAX, Ty, Legal); in NVPTXTargetLowering()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 580 setOperationAction(ISD::SMAX, VT, Legal); in PPCTargetLowering()
586 setOperationAction(ISD::SMAX, VT, Expand); in PPCTargetLowering()
681 setOperationAction(ISD::SMAX, MVT::v2i64, Expand); in PPCTargetLowering()
718 // Without hasP8Altivec set, v2i64 SMAX isn't available. in PPCTargetLowering()
719 // But ABS custom lowering requires SMAX support. in PPCTargetLowering()
10340 // SMAX patch https://reviews.llvm.org/D47332 in LowerABS()
10342 // TODO: Should use SMAX directly once SMAX patch landed in LowerABS()
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