Home
last modified time | relevance | path

Searched refs:RS (Results 1 - 25 of 151) sorted by relevance

1234567

/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/FuzzMutate/
H A DIRMutator.cpp39 auto RS = makeSampler<Function *>(IB.Rand); in mutate() local
42 RS.sample(&F, /*Weight=*/1); in mutate()
43 mutate(*RS.getSelection(), IB); in mutate()
61 auto RS = makeSampler<IRMutationStrategy *>(IB.Rand); in mutateModule() local
63 RS.sample(Strategy.get(), in mutateModule()
64 Strategy->getWeight(CurSize, MaxSize, RS.totalWeight())); in mutateModule()
65 auto Strategy = RS.getSelection(); in mutateModule()
100 auto RS = makeSampler(IB.Rand, make_filter_range(Operations, OpMatchesPred)); in chooseOperation() local
101 if (RS.isEmpty()) in chooseOperation()
103 return *RS; in chooseOperation()
154 auto RS = makeSampler<Instruction *>(IB.Rand); mutate() local
185 auto RS = makeSampler<Value *>(IB.Rand); mutate() local
[all...]
H A DRandomIRBuilder.cpp33 auto RS = makeSampler(Rand, make_filter_range(Insts, MatchesPred)); in findOrCreateSource() local
35 RS.sample(nullptr, /*Weight=*/1); in findOrCreateSource()
36 if (Instruction *Src = RS.getSelection()) in findOrCreateSource()
44 auto RS = makeSampler<Value *>(Rand); in newSource() local
45 RS.sample(Pred.generate(Srcs, KnownTypes)); in newSource()
61 RS.sample(NewLoad, RS.totalWeight()); in newSource()
66 assert(!RS.isEmpty() && "Failed to generate sources"); in newSource()
67 return RS.getSelection(); in newSource()
97 auto RS in connectToSink() local
[all...]
/third_party/musl/porting/liteos_a/kernel/src/string/
H A Dmemcpy.c14 #define RS << in memcpy() macro
17 #define RS >> in memcpy() macro
59 *(u32 *)(d+0) = (w LS 24) | (x RS 8); in memcpy()
61 *(u32 *)(d+4) = (x LS 24) | (w RS 8); in memcpy()
63 *(u32 *)(d+8) = (w LS 24) | (x RS 8); in memcpy()
65 *(u32 *)(d+12) = (x LS 24) | (w RS 8); in memcpy()
75 *(u32 *)(d+0) = (w LS 16) | (x RS 16); in memcpy()
77 *(u32 *)(d+4) = (x LS 16) | (w RS 16); in memcpy()
79 *(u32 *)(d+8) = (w LS 16) | (x RS 16); in memcpy()
81 *(u32 *)(d+12) = (x LS 16) | (w RS 1 in memcpy()
[all...]
/third_party/musl/porting/liteos_m/kernel/src/string/
H A Dmemcpy.c19 #define RS << in __memcpy() macro
22 #define RS >> in __memcpy() macro
64 *(u32 *)(d+0) = (w LS 24) | (x RS 8); in __memcpy()
66 *(u32 *)(d+4) = (x LS 24) | (w RS 8); in __memcpy()
68 *(u32 *)(d+8) = (w LS 24) | (x RS 8); in __memcpy()
70 *(u32 *)(d+12) = (x LS 24) | (w RS 8); in __memcpy()
80 *(u32 *)(d+0) = (w LS 16) | (x RS 16); in __memcpy()
82 *(u32 *)(d+4) = (x LS 16) | (w RS 16); in __memcpy()
84 *(u32 *)(d+8) = (w LS 16) | (x RS 16); in __memcpy()
86 *(u32 *)(d+12) = (x LS 16) | (w RS 1 in __memcpy()
[all...]
/third_party/musl/porting/liteos_m/user/src/string/
H A Dmemcpy.c15 #define RS << in memcpy() macro
18 #define RS >> in memcpy() macro
60 *(u32 *)(d+0) = (w LS 24) | (x RS 8); in memcpy()
62 *(u32 *)(d+4) = (x LS 24) | (w RS 8); in memcpy()
64 *(u32 *)(d+8) = (w LS 24) | (x RS 8); in memcpy()
66 *(u32 *)(d+12) = (x LS 24) | (w RS 8); in memcpy()
76 *(u32 *)(d+0) = (w LS 16) | (x RS 16); in memcpy()
78 *(u32 *)(d+4) = (x LS 16) | (w RS 16); in memcpy()
80 *(u32 *)(d+8) = (w LS 16) | (x RS 16); in memcpy()
82 *(u32 *)(d+12) = (x LS 16) | (w RS 1 in memcpy()
[all...]
/third_party/musl/porting/uniproton/kernel/src/string/
H A Dmemcpy.c15 #define RS << in memcpy() macro
18 #define RS >> in memcpy() macro
60 *(u32 *)(d+0) = (w LS 24) | (x RS 8); in memcpy()
62 *(u32 *)(d+4) = (x LS 24) | (w RS 8); in memcpy()
64 *(u32 *)(d+8) = (w LS 24) | (x RS 8); in memcpy()
66 *(u32 *)(d+12) = (x LS 24) | (w RS 8); in memcpy()
76 *(u32 *)(d+0) = (w LS 16) | (x RS 16); in memcpy()
78 *(u32 *)(d+4) = (x LS 16) | (w RS 16); in memcpy()
80 *(u32 *)(d+8) = (w LS 16) | (x RS 16); in memcpy()
82 *(u32 *)(d+12) = (x LS 16) | (w RS 1 in memcpy()
[all...]
/third_party/musl/src/string/
H A Dmemcpy.c14 #define RS << in memcpy() macro
17 #define RS >> in memcpy() macro
59 *(u32 *)(d+0) = (w LS 24) | (x RS 8); in memcpy()
61 *(u32 *)(d+4) = (x LS 24) | (w RS 8); in memcpy()
63 *(u32 *)(d+8) = (w LS 24) | (x RS 8); in memcpy()
65 *(u32 *)(d+12) = (x LS 24) | (w RS 8); in memcpy()
75 *(u32 *)(d+0) = (w LS 16) | (x RS 16); in memcpy()
77 *(u32 *)(d+4) = (x LS 16) | (w RS 16); in memcpy()
79 *(u32 *)(d+8) = (w LS 16) | (x RS 16); in memcpy()
81 *(u32 *)(d+12) = (x LS 16) | (w RS 1 in memcpy()
[all...]
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/MCA/HardwareUnits/
H A DResourceManager.cpp105 getStrategyFor(const ResourceState &RS) { in getStrategyFor() argument
106 if (RS.isAResourceGroup() || RS.getNumUnits() > 1) in getStrategyFor()
107 return std::make_unique<DefaultResourceStrategy>(RS.getReadyMask()); in getStrategyFor()
138 const ResourceState &RS = *Resources[Index]; in ResourceManager() local
139 if (!RS.isAResourceGroup()) { in ResourceManager()
180 ResourceState &RS = *Resources[Index]; in selectPipe()
181 assert(RS.isReady() && "No available units to select!"); in selectPipe()
183 // Special case where RS is not a group, and it only declares a single in selectPipe()
185 if (!RS in selectPipe()
197 ResourceState &RS = *Resources[RSID]; use() local
226 ResourceState &RS = *Resources[RSID]; release() local
256 ResourceState &RS = *Resources[getResourceStateIndex(CurrentBuffer)]; reserveBuffers() local
274 ResourceState &RS = *Resources[getResourceStateIndex(CurrentBuffer)]; releaseBuffers() local
[all...]
H A DRegisterFile.cpp291 bool RegisterFile::tryEliminateMove(WriteState &WS, ReadState &RS) { in tryEliminateMove() argument
292 const RegisterMapping &RMFrom = RegisterMappings[RS.getRegisterID()]; in tryEliminateMove()
329 bool IsZeroMove = ZeroRegisters[RS.getRegisterID()]; in tryEliminateMove()
335 RRIFrom.RenameAs ? RRIFrom.RenameAs : RS.getRegisterID(); in tryEliminateMove()
348 RS.setReadZero(); in tryEliminateMove()
356 void RegisterFile::collectWrites(const ReadState &RS, in collectWrites() argument
358 MCPhysReg RegID = RS.getRegisterID(); in collectWrites()
398 void RegisterFile::addRegisterRead(ReadState &RS,
400 MCPhysReg RegID = RS.getRegisterID();
402 RS
[all...]
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/FuzzMutate/
H A DRandom.h76 ReservoirSampler<ElT, GenT> RS(RandGen); in makeSampler()
77 RS.sample(Items); in makeSampler()
78 return RS; in makeSampler()
84 ReservoirSampler<T, GenT> RS(RandGen); in makeSampler()
85 RS.sample(Item, Weight); in makeSampler()
86 return RS; in makeSampler()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/
H A DShrinkWrap.cpp163 bool useOrDefCSROrFI(const MachineInstr &MI, RegScavenger *RS) const;
165 const SetOfRegs &getCurrentCSRs(RegScavenger *RS) const { in getCurrentCSRs()
171 TFI->determineCalleeSaves(*MachineFunc, SavedRegs, RS); in getCurrentCSRs()
185 void updateSaveRestorePoints(MachineBasicBlock &MBB, RegScavenger *RS);
261 RegScavenger *RS) const { in useOrDefCSROrFI()
295 for (unsigned Reg : getCurrentCSRs(RS)) { in useOrDefCSROrFI()
328 RegScavenger *RS) { in updateSaveRestorePoints()
355 if (!useOrDefCSROrFI(Terminator, RS)) in updateSaveRestorePoints()
485 std::unique_ptr<RegScavenger> RS( in runOnMachineFunction()
505 updateSaveRestorePoints(MBB, RS in runOnMachineFunction()
327 updateSaveRestorePoints(MachineBasicBlock &MBB, RegScavenger *RS) updateSaveRestorePoints() argument
[all...]
H A DRegisterScavenging.cpp620 /// \p VReg is around the current position of the register scavenger \p RS.
624 static Register scavengeVReg(MachineRegisterInfo &MRI, RegScavenger &RS, in scavengeVReg() argument
668 Register SReg = RS.scavengeRegisterBackwards(RC, DefMI.getIterator(), in scavengeVReg()
679 RegScavenger &RS, in scavengeFrameVirtualRegsInBlock()
682 RS.enterBasicBlockEnd(MBB); in scavengeFrameVirtualRegsInBlock()
689 RS.backward(I); in scavengeFrameVirtualRegsInBlock()
708 Register SReg = scavengeVReg(MRI, RS, Reg, true); in scavengeFrameVirtualRegsInBlock()
710 RS.setRegUsed(SReg); in scavengeFrameVirtualRegsInBlock()
734 Register SReg = scavengeVReg(MRI, RS, Reg, false); in scavengeFrameVirtualRegsInBlock()
752 void llvm::scavengeFrameVirtualRegs(MachineFunction &MF, RegScavenger &RS) { in scavengeFrameVirtualRegs() argument
678 scavengeFrameVirtualRegsInBlock(MachineRegisterInfo &MRI, RegScavenger &RS, MachineBasicBlock &MBB) scavengeFrameVirtualRegsInBlock() argument
798 RegScavenger RS; global() local
[all...]
H A DPrologEpilogInserter.cpp100 RegScavenger *RS; member in __anon24084::PEI
221 RS = TRI->requiresRegisterScavenging(MF) ? new RegScavenger() : nullptr; in runOnMachineFunction()
245 TFI->processFunctionBeforeFrameFinalized(MF, RS); in runOnMachineFunction()
271 scavengeFrameVirtualRegs(MF, *RS); in runOnMachineFunction()
287 delete RS; in runOnMachineFunction()
607 TFI->determineCalleeSaves(MF, SavedRegs, RS); in spillCalleeSavedRegs()
889 if (RS && EarlyScavengingSlots) { in calculateFrameObjectOffsets()
891 RS->getScavengingFrameIndices(SFIs); in calculateFrameObjectOffsets()
954 if (RS && RS in calculateFrameObjectOffsets()
[all...]
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/XCore/
H A DXCoreRegisterInfo.cpp95 int Offset, RegScavenger *RS ) { in InsertFPConstInst()
96 assert(RS && "requiresRegisterScavenging failed"); in InsertFPConstInst()
100 unsigned ScratchOffset = RS->scavengeRegister(&XCore::GRRegsRegClass, II, 0); in InsertFPConstInst()
101 RS->setRegUsed(ScratchOffset); in InsertFPConstInst()
163 unsigned Reg, int Offset, RegScavenger *RS ) { in InsertSPConstInst()
164 assert(RS && "requiresRegisterScavenging failed"); in InsertSPConstInst()
172 ScratchBase = RS->scavengeRegister(&XCore::GRRegsRegClass, II, 0); in InsertSPConstInst()
173 RS->setRegUsed(ScratchBase); in InsertSPConstInst()
177 unsigned ScratchOffset = RS->scavengeRegister(&XCore::GRRegsRegClass, II, 0); in InsertSPConstInst()
178 RS in InsertSPConstInst()
[all...]
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARC/
H A DARCRegisterInfo.cpp41 int ObjSize, RegScavenger *RS, int SPAdj) { in ReplaceFrameIndex()
42 assert(RS && "Need register scavenger."); in ReplaceFrameIndex()
60 BaseReg = RS->FindUnusedReg(&ARC::GPR32RegClass); in ReplaceFrameIndex()
66 BaseReg = RS->scavengeRegister(&ARC::GPR32RegClass, II, SPAdj); in ReplaceFrameIndex()
72 RS->setRegUsed(BaseReg); in ReplaceFrameIndex()
167 RegScavenger *RS) const { in eliminateFrameIndex()
223 ObjSize, RS, SPAdj); in eliminateFrameIndex()
38 ReplaceFrameIndex(MachineBasicBlock::iterator II, const ARCInstrInfo &TII, unsigned Reg, unsigned FrameReg, int Offset, int StackSize, int ObjSize, RegScavenger *RS, int SPAdj) ReplaceFrameIndex() argument
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/ExecutionEngine/Orc/
H A DCompileOnDemandLayer.h528 auto RS = getResponsibilitySetWithLegacyFn(Symbols, LegacyLookup); in addLogicalModule()
530 if (!RS) { in addLogicalModule()
532 RS.takeError(), errs(), in addLogicalModule()
537 if (RS->size() == Symbols.size()) in addLogicalModule()
538 return *RS; in addLogicalModule()
542 if (!RS->count(S)) in addLogicalModule()
548 (*RS).insert(S); in addLogicalModule()
550 return *RS; in addLogicalModule()
698 auto RS = getResponsibilitySetWithLegacyFn(Symbols, LegacyLookup); in emitPartition()
699 if (!RS) { in emitPartition()
[all...]
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/
H A DRegAllocPBQP.h184 : RS(Other.RS), NumOpts(Other.NumOpts), DeniedOpts(Other.DeniedOpts), in NodeMetadata()
213 ReductionState getReductionState() const { return RS; } in getReductionState()
214 void setReductionState(ReductionState RS) { in setReductionState() argument
215 assert(RS >= this->RS && "A node's reduction state can not be downgraded"); in setReductionState()
216 this->RS = RS; in setReductionState()
221 if (RS == ConservativelyAllocatable) in setReductionState()
255 ReductionState RS member in llvm::PBQP::RegAlloc::NodeMetadata
[all...]
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/DebugInfo/PDB/Native/
H A DGSIStreamBuilder.cpp120 size_t RS = S2.size();
122 if (LS != RS)
123 return LS < RS;
234 const std::pair<const CVSymbol *, const PublicSym32 *> &RS) {
235 if (LS.second->Segment != RS.second->Segment)
236 return LS.second->Segment < RS.second->Segment;
237 if (LS.second->Offset != RS.second->Offset)
238 return LS.second->Offset < RS.second->Offset;
240 return LS.second->Name < RS.second->Name;
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/
H A DHexagonBitSimplify.cpp78 RegisterSet(const RegisterSet &RS) = default; member
161 : RS(S), TRI(RI) {} in PrintRegSet()
167 const RegisterSet &RS; member
175 for (unsigned R = P.RS.find_first(); R; R = P.RS.find_next(R)) in operator <<()
229 const BitTracker::RegisterRef &RS, MachineRegisterInfo &MRI);
922 // Check if RD could be replaced with RS at any possible use of RD.
927 const BitTracker::RegisterRef &RS, MachineRegisterInfo &MRI) {
929 !Register::isVirtualRegister(RS.Reg))
936 return DRC == getFinalVRegClass(RS, MR
[all...]
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/MCA/HardwareUnits/
H A DRegisterFile.h176 // Collects writes that are in a RAW dependency with RS.
178 void collectWrites(const ReadState &RS,
197 // Collect writes that are in a data dependency with RS, and update RS
199 void addRegisterRead(ReadState &RS, const MCSubtargetInfo &STI) const;
207 // Returns true if a move from RS to WS can be eliminated.
209 // If RS is a read from a zero register, and WS is eliminated, then
212 bool tryEliminateMove(WriteState &WS, ReadState &RS);
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
H A DSIFrameLowering.h38 RegScavenger *RS = nullptr) const override;
40 RegScavenger *RS = nullptr) const;
50 RegScavenger *RS = nullptr) const override;
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/MCA/
H A DInstruction.cpp61 ReadState *RS = User.first; in onInstructionIssued() local
63 RS->writeStartEvent(IID, RegisterID, ReadCycles); in onInstructionIssued()
149 for (const ReadState &RS : getUses()) { in computeCriticalRegDep()
150 const CriticalDependency &ReadCRD = RS.getCriticalRegDep(); in computeCriticalRegDep()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/DebugInfo/DWARF/
H A DDWARFCompileUnit.h21 const DWARFSection *RS, const DWARFSection *LocSection, in DWARFCompileUnit()
25 : DWARFUnit(Context, Section, Header, DA, RS, LocSection, SS, SOS, AOS, in DWARFCompileUnit()
19 DWARFCompileUnit(DWARFContext &Context, const DWARFSection &Section, const DWARFUnitHeader &Header, const DWARFDebugAbbrev *DA, const DWARFSection *RS, const DWARFSection *LocSection, StringRef SS, const DWARFSection &SOS, const DWARFSection *AOS, const DWARFSection &LS, bool LE, bool IsDWO, const DWARFUnitVector &UnitVector) DWARFCompileUnit() argument
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/BPF/
H A DBPFFrameLowering.cpp33 RegScavenger *RS) const { in determineCalleeSaves()
34 TargetFrameLowering::determineCalleeSaves(MF, SavedRegs, RS); in determineCalleeSaves()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/
H A DPPCFrameLowering.h109 RegScavenger *RS = nullptr) const override;
111 RegScavenger *RS = nullptr) const override;
112 void addScavengingSpillSlot(MachineFunction &MF, RegScavenger *RS) const;

Completed in 26 milliseconds

1234567