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Help
Searched
refs:REG_A0
(Results
1 - 11
of
11
) sorted by relevance
/third_party/mesa3d/src/freedreno/ir3/
H
A
D
ir3_legalize_relative.c
37
if (reg->num == regid(
REG_A0
, 0))
in is_dst_a0()
H
A
D
ir3.h
894
if (reg_num(dst) ==
REG_A0
)
in is_same_type_mov()
1173
if ((reg_num(dst) ==
REG_A0
) || (dst->num == regid(REG_P0, 0)))
in is_dest_gpr()
1192
return dst->num == regid(
REG_A0
, 0);
in writes_addr0()
1203
return dst->num == regid(
REG_A0
, 1);
in writes_addr1()
1227
return (reg->flags & IR3_REG_SHARED) || (reg_num(reg) ==
REG_A0
) ||
in is_reg_special()
1261
if ((reg_num(r) ==
REG_A0
) || (reg_num(r) == REG_P0))
in reg_gpr()
H
A
D
ir3_ra.h
90
return reg_num(reg) !=
REG_A0
&& reg_num(reg) != REG_P0;
in def_is_gpr()
H
A
D
ir3_context.c
449
instr->dsts[0]->num = regid(
REG_A0
, 0);
in create_addr0()
460
instr->dsts[0]->num = regid(
REG_A0
, 1);
in create_addr1()
H
A
D
instr-a3xx.h
499
#define
REG_A0
61 /* address register */
macro
H
A
D
ir3.c
640
assert(reg_num(addr->dsts[0]) ==
REG_A0
);
in ir3_instr_set_address()
/third_party/musl/arch/riscv32/bits/
H
A
D
signal.h
45
#define
REG_A0
10
macro
/third_party/musl/arch/riscv64/bits/
H
A
D
signal.h
45
#define
REG_A0
10
macro
/third_party/rust/crates/libc/src/unix/linux_like/linux/gnu/b32/riscv32/
H
A
D
mod.rs
462
pub const
REG_A0
: usize = 10;
consts
/third_party/rust/crates/libc/src/unix/linux_like/linux/musl/b64/riscv64/
H
A
D
mod.rs
733
pub const
REG_A0
: usize = 10;
consts
/third_party/rust/crates/libc/src/unix/linux_like/linux/gnu/b64/riscv64/
H
A
D
mod.rs
501
pub const
REG_A0
: usize = 10;
consts
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