/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/ |
H A D | DAGCombiner.cpp | 376 SDValue visitADDLikeCommutative(SDValue N0, SDValue N1, SDNode *LocReference); 382 SDValue visitUADDOLike(SDValue N0, SDValue N1, SDNode *N); 387 SDValue visitADDCARRYLike(SDValue N0, SDValue N1, SDValue CarryIn, SDNode *N); 394 SDValue visitSDIVLike(SDValue N0, SDValue N1, SDNode *N); 396 SDValue visitUDIVLike(SDValue N0, SDValue N1, SDNode *N); 405 SDValue visitANDLike(SDValue N0, SDValue N1, SDNode *N); 407 SDValue visitORLike(SDValue N0, SDValue N1, SDNode *N); 493 const SDLoc &DL, SDValue N0, 495 SDValue reassociateOpsCommutative(unsigned Opc, const SDLoc &DL, SDValue N0, 497 SDValue reassociateOps(unsigned Opc, const SDLoc &DL, SDValue N0, 844 SDValue N0, N1, N2; isOneUseSetCC() local 889 reassociationCanBreakAddressingModePattern(unsigned Opc, const SDLoc &DL, SDValue N0, SDValue N1) reassociationCanBreakAddressingModePattern() argument 947 reassociateOpsCommutative(unsigned Opc, const SDLoc &DL, SDValue N0, SDValue N1) reassociateOpsCommutative() argument 978 reassociateOps(unsigned Opc, const SDLoc &DL, SDValue N0, SDValue N1, SDNodeFlags Flags) reassociateOps() argument 1202 SDValue N0 = Op.getOperand(0); PromoteIntBinOp() local 1267 SDValue N0 = Op.getOperand(0); PromoteIntShiftOp() local 1682 SDValue N0 = N->getOperand(0); combine() local 2083 SDValue N0 = N->getOperand(0); visitADDLike() local 2301 SDValue N0 = N->getOperand(0); visitADD() local 2325 SDValue N0 = N->getOperand(0); visitADDSAT() local 2411 foldAddSubMasked1(bool IsAdd, SDValue N0, SDValue N1, SelectionDAG &DAG, const SDLoc &DL) foldAddSubMasked1() argument 2426 visitADDLikeCommutative(SDValue N0, SDValue N1, SDNode *LocReference) visitADDLikeCommutative() argument 2506 SDValue N0 = N->getOperand(0); visitADDC() local 2596 SDValue N0 = N->getOperand(0); visitADDO() local 2642 visitUADDOLike(SDValue N0, SDValue N1, SDNode *N) visitUADDOLike() argument 2667 SDValue N0 = N->getOperand(0); visitADDE() local 2686 SDValue N0 = N->getOperand(0); visitADDCARRY() local 2901 visitADDCARRYLike(SDValue N0, SDValue N1, SDValue CarryIn, SDNode *N) visitADDCARRYLike() argument 2952 SDValue N0 = N->getOperand(0); visitSUB() local 3275 SDValue N0 = N->getOperand(0); visitSUBSAT() local 3312 SDValue N0 = N->getOperand(0); visitSUBC() local 3340 SDValue N0 = N->getOperand(0); visitSUBO() local 3379 SDValue N0 = N->getOperand(0); visitSUBE() local 3391 SDValue N0 = N->getOperand(0); visitSUBCARRY() local 3408 SDValue N0 = N->getOperand(0); visitMULFIX() local 3430 SDValue N0 = N->getOperand(0); visitMUL() local 3690 SDValue N0 = N->getOperand(0); simplifyDivRem() local 3736 SDValue N0 = N->getOperand(0); visitSDIV() local 3798 visitSDIVLike(SDValue N0, SDValue N1, SDNode *N) visitSDIVLike() argument 3880 SDValue N0 = N->getOperand(0); visitUDIV() local 3936 visitUDIVLike(SDValue N0, SDValue N1, SDNode *N) visitUDIVLike() argument 3982 SDValue N0 = N->getOperand(0); visitREM() local 4063 SDValue N0 = N->getOperand(0); visitMULHS() local 4110 SDValue N0 = N->getOperand(0); visitMULHU() local 4289 SDValue N0 = N->getOperand(0); visitMULO() local 4317 SDValue N0 = N->getOperand(0); visitIMINMAX() local 4361 SDValue N0 = N->getOperand(0), N1 = N->getOperand(1); hoistLogicOpWithSameOpcodeHands() local 4523 foldLogicOfSetCCs(bool IsAnd, SDValue N0, SDValue N1, const SDLoc &DL) foldLogicOfSetCCs() argument 4673 visitANDLike(SDValue N0, SDValue N1, SDNode *N) visitANDLike() argument 5046 SDValue N0 = N->getOperand(0); unfoldExtremeBitClearingToShifts() local 5146 SDValue N0 = N->getOperand(0); visitAND() local 5438 MatchBSwapHWordLow(SDNode *N, SDValue N0, SDValue N1, bool DemandHighBits) MatchBSwapHWordLow() argument 5663 MatchBSwapHWord(SDNode *N, SDValue N0, SDValue N1) MatchBSwapHWord() argument 5717 visitORLike(SDValue N0, SDValue N1, SDNode *N) visitORLike() argument 5769 visitORCommutative( SelectionDAG &DAG, SDValue N0, SDValue N1, SDNode *N) visitORCommutative() argument 5786 SDValue N0 = N->getOperand(0); visitOR() local 6976 SDValue N0 = N->getOperand(0); unfoldMaskedMerge() local 7013 SDValue N0 = N->getOperand(0); visitXOR() local 7391 SDValue N0 = N->getOperand(0); visitRotate() local 7448 SDValue N0 = N->getOperand(0); visitSHL() local 7698 SDValue N0 = N->getOperand(0); visitSRA() local 7890 SDValue N0 = N->getOperand(0); visitSRL() local 8119 SDValue N0 = N->getOperand(0); visitFunnelShift() local 8193 SDValue N0 = N->getOperand(0); visitABS() local 8209 SDValue N0 = N->getOperand(0); visitBSWAP() local 8222 SDValue N0 = N->getOperand(0); visitBITREVERSE() local 8235 SDValue N0 = N->getOperand(0); visitCTLZ() local 8252 SDValue N0 = N->getOperand(0); visitCTLZ_ZERO_UNDEF() local 8262 SDValue N0 = N->getOperand(0); visitCTTZ() local 8279 SDValue N0 = N->getOperand(0); visitCTTZ_ZERO_UNDEF() local 8289 SDValue N0 = N->getOperand(0); visitCTPOP() local 8505 SDValue N0 = N->getOperand(0); visitSELECT() local 8868 SDValue N0 = N->getOperand(0); visitVSELECT() local 8983 SDValue N0 = N->getOperand(0); visitSELECT_CC() local 9078 SDValue N0 = N->getOperand(0); tryToFoldExtendOfConstant() local 9162 ExtendUsesToFormExtLoad(EVT VT, SDNode *N, SDValue N0, unsigned ExtOpc, SmallVectorImpl<SDNode *> &ExtendNodes, const TargetLowering &TLI) ExtendUsesToFormExtLoad() argument 9245 SDValue N0 = N->getOperand(0); CombineExtLoad() local 9467 tryToFoldExtOfExtload(SelectionDAG &DAG, DAGCombiner &Combiner, const TargetLowering &TLI, EVT VT, bool LegalOperations, SDNode *N, SDValue N0, ISD::LoadExtType ExtLoadType) tryToFoldExtOfExtload() argument 9498 tryToFoldExtOfLoad(SelectionDAG &DAG, DAGCombiner &Combiner, const TargetLowering &TLI, EVT VT, bool LegalOperations, SDNode *N, SDValue N0, ISD::LoadExtType ExtLoadType, ISD::NodeType ExtOpc) tryToFoldExtOfLoad() argument 9538 tryToFoldExtOfMaskedLoad(SelectionDAG &DAG, const TargetLowering &TLI, EVT VT, SDNode *N, SDValue N0, ISD::LoadExtType ExtLoadType, ISD::NodeType ExtOpc) tryToFoldExtOfMaskedLoad() argument 9603 SDValue N0 = N->getOperand(0); visitSIGN_EXTEND() local 9892 SDValue N0 = N->getOperand(0); visitZERO_EXTEND() local 10148 SDValue N0 = N->getOperand(0); visitANY_EXTEND() local 10298 SDValue N0 = N->getOperand(0); visitAssertExt() local 10361 SDValue N0 = N->getOperand(0); ReduceLoadWidth() local 10561 SDValue N0 = N->getOperand(0); visitSIGN_EXTEND_INREG() local 10695 SDValue N0 = N->getOperand(0); visitSIGN_EXTEND_VECTOR_INREG() local 10711 SDValue N0 = N->getOperand(0); visitZERO_EXTEND_VECTOR_INREG() local 10727 SDValue N0 = N->getOperand(0); visitTRUNCATE() local 11140 SDValue N0 = N->getOperand(0); visitBITCAST() local 11514 SDValue N0 = N->getOperand(0); visitFADDForFMACombine() local 11732 SDValue N0 = N->getOperand(0); visitFSUBForFMACombine() local 12034 SDValue N0 = N->getOperand(0); visitFMULForFMADistributiveCombine() local 12126 SDValue N0 = N->getOperand(0); visitFADD() local 12305 SDValue N0 = N->getOperand(0); visitFSUB() local 12397 SDValue N0 = N->getOperand(0); visitFMUL() local 12531 SDValue N0 = N->getOperand(0); visitFMA() local 12729 SDValue N0 = N->getOperand(0); visitFDIV() local 12833 SDValue N0 = N->getOperand(0); visitFREM() local 12881 SDValue N0 = N->getOperand(0); visitFCOPYSIGN() local 13039 SDValue N0 = N->getOperand(0); visitSINT_TO_FP() local 13100 SDValue N0 = N->getOperand(0); visitUINT_TO_FP() local 13147 SDValue N0 = N->getOperand(0); FoldIntToFPToInt() local 13188 SDValue N0 = N->getOperand(0); visitFP_TO_SINT() local 13203 SDValue N0 = N->getOperand(0); visitFP_TO_UINT() local 13218 SDValue N0 = N->getOperand(0); visitFP_ROUND() local 13274 SDValue N0 = N->getOperand(0); visitFP_EXTEND() local 13327 SDValue N0 = N->getOperand(0); visitFCEIL() local 13338 SDValue N0 = N->getOperand(0); visitFTRUNC() local 13362 SDValue N0 = N->getOperand(0); visitFFLOOR() local 13374 SDValue N0 = N->getOperand(0); visitFNEG() local 13441 SDValue N0 = N->getOperand(0); visitFMinMax() local 13478 SDValue N0 = N->getOperand(0); visitFABS() local 18669 SDValue N0 = Shuf->getOperand(0), N1 = Shuf->getOperand(1); foldShuffleOfConcatUndefs() local 18796 SDValue N0 = SVN->getOperand(0); combineShuffleOfScalars() local 18886 SDValue N0 = SVN->getOperand(0); global() local 19150 SDValue N0 = N->getOperand(0); visitVECTOR_SHUFFLE() local 19570 SDValue N0 = N->getOperand(0); visitINSERT_SUBVECTOR() local 19713 SDValue N0 = N->getOperand(0); visitFP_TO_FP16() local 19723 SDValue N0 = N->getOperand(0); visitFP16_TO_FP() local 19738 SDValue N0 = N->getOperand(0); visitVECREDUCE() local 19859 SDValue N0 = N->getOperand(0); scalarizeBinOpOfSplats() local 20004 SimplifySelect(const SDLoc &DL, SDValue N0, SDValue N1, SDValue N2) SimplifySelect() argument 20229 foldSelectCCToShiftAnd(const SDLoc &DL, SDValue N0, SDValue N1, SDValue N2, SDValue N3, ISD::CondCode CC) foldSelectCCToShiftAnd() argument 20304 convertSelectOfFPConstantsToLoadOffset( const SDLoc &DL, SDValue N0, SDValue N1, SDValue N2, SDValue N3, ISD::CondCode CC) convertSelectOfFPConstantsToLoadOffset() argument 20359 SimplifySelectCC(const SDLoc &DL, SDValue N0, SDValue N1, SDValue N2, SDValue N3, ISD::CondCode CC, bool NotExtCompare) SimplifySelectCC() argument 20508 SimplifySetCC(EVT VT, SDValue N0, SDValue N1, ISD::CondCode Cond, const SDLoc &DL, bool foldBooleans) SimplifySetCC() argument [all...] |
H A D | TargetLowering.cpp | 2731 TargetLowering::buildLegalVectorShuffle(EVT VT, const SDLoc &DL, SDValue N0, in buildLegalVectorShuffle() argument 2736 std::swap(N0, N1); in buildLegalVectorShuffle() 2744 return DAG.getVectorShuffle(VT, DL, N0, N1, Mask); in buildLegalVectorShuffle() 2845 SDValue TargetLowering::foldSetCCWithAnd(EVT VT, SDValue N0, SDValue N1, in foldSetCCWithAnd() argument 2851 if (N1.getOpcode() == ISD::AND && N0.getOpcode() != ISD::AND) in foldSetCCWithAnd() 2852 std::swap(N0, N1); in foldSetCCWithAnd() 2854 EVT OpVT = N0.getValueType(); in foldSetCCWithAnd() 2855 if (N0.getOpcode() != ISD::AND || !OpVT.isInteger() || in foldSetCCWithAnd() 2860 if (N0.getOperand(0) == N1) { in foldSetCCWithAnd() 2861 X = N0 in foldSetCCWithAnd() 2914 optimizeSetCCOfSignedTruncationCheck( EVT SCCVT, SDValue N0, SDValue N1, ISD::CondCode Cond, DAGCombinerInfo &DCI, const SDLoc &DL) const optimizeSetCCOfSignedTruncationCheck() argument 3003 optimizeSetCCByHoistingAndByConstFromLogicalShift( EVT SCCVT, SDValue N0, SDValue N1C, ISD::CondCode Cond, DAGCombinerInfo &DCI, const SDLoc &DL) const optimizeSetCCByHoistingAndByConstFromLogicalShift() argument 3076 foldSetCCWithBinOp(EVT VT, SDValue N0, SDValue N1, ISD::CondCode Cond, const SDLoc &DL, DAGCombinerInfo &DCI) const foldSetCCWithBinOp() argument 3118 SimplifySetCC(EVT VT, SDValue N0, SDValue N1, ISD::CondCode Cond, bool foldBooleans, DAGCombinerInfo &DCI, const SDLoc &dl) const SimplifySetCC() argument 4759 SDValue N0 = N->getOperand(0); BuildSDIV() local 4877 SDValue N0 = N->getOperand(0); BuildUDIV() local [all...] |
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-subzero/include/llvm/ADT/ |
H A D | StringSwitch.h | 105 template<unsigned N0, unsigned N1> 107 StringSwitch &Cases(const char (&S0)[N0], const char (&S1)[N1], in Cases() 112 template<unsigned N0, unsigned N1, unsigned N2> 114 StringSwitch &Cases(const char (&S0)[N0], const char (&S1)[N1], in Cases() 119 template<unsigned N0, unsigned N1, unsigned N2, unsigned N3> 121 StringSwitch &Cases(const char (&S0)[N0], const char (&S1)[N1], in Cases() 127 template<unsigned N0, unsigned N1, unsigned N2, unsigned N3, unsigned N4> 129 StringSwitch &Cases(const char (&S0)[N0], const char (&S1)[N1], in Cases() 135 template <unsigned N0, unsigned N1, unsigned N2, unsigned N3, unsigned N4, 138 StringSwitch &Cases(const char (&S0)[N0], cons [all...] |
/third_party/ffmpeg/libavfilter/ |
H A D | vf_pp7.c | 68 #define N0 4 macro 77 N / (N0 * N0), N / (N0 * N1), N / (N0 * N0), N / (N0 * N2), 78 N / (N1 * N0), N / (N1 * N1), N / (N1 * N0), N / (N1 * N2), 79 N / (N0 * N [all...] |
/third_party/ffmpeg/libavcodec/ |
H A D | opus_pvq.c | 151 int i, j, N0 = N / B; in celt_extract_collapse_mask() local 158 for (j = 0; j < N0; j++) in celt_extract_collapse_mask() 159 collapse_mask |= (!!iy[i*N0+j]) << i; in celt_extract_collapse_mask() 201 static void celt_interleave_hadamard(float *tmp, float *X, int N0, in celt_interleave_hadamard() argument 204 int i, j, N = N0*stride; in celt_interleave_hadamard() 208 for (j = 0; j < N0; j++) in celt_interleave_hadamard() 209 tmp[j*stride+i] = X[order[i]*N0+j]; in celt_interleave_hadamard() 214 static void celt_deinterleave_hadamard(float *tmp, float *X, int N0, in celt_deinterleave_hadamard() argument 217 int i, j, N = N0*stride; in celt_deinterleave_hadamard() 221 for (j = 0; j < N0; in celt_deinterleave_hadamard() 227 celt_haar1(float *X, int N0, int stride) celt_haar1() argument 497 uint32_t N0 = N; quant_band_template() local [all...] |
/third_party/node/deps/openssl/openssl/crypto/bn/asm/ |
H A D | armv4-mont.pl | 304 my ($N0,$N1,$N2,$N3)=map("d$_",(4..7)); 353 vld1.32 {$N0-$N3}, [$nptr]! 359 vmlal.u32 @ACC[0],$Ni,${N0}[0] 361 vmlal.u32 @ACC[1],$Ni,${N0}[1] 408 vmlal.u32 @ACC[0],$Ni,${N0}[0] 409 vmlal.u32 @ACC[1],$Ni,${N0}[1] 481 vld1.32 {$N0-$N3},[$nptr]! 501 vmlal.u32 @ACC[0],$Ni,${N0}[0] 503 vmlal.u32 @ACC[1],$Ni,${N0}[1] 538 vmlal.u32 @ACC[0],$Ni,${N0}[ [all...] |
H A D | ppc64-mont.pl | 176 $N0="f20"; $N1="f21"; $N2="f22"; $N3="f23"; 401 lfd $N0,`$FRAME+96`($sp) 409 fcfid $N0,$N0 426 stfd $N0,40($nap_d) ; save n[j] in double format 448 fmadd $T0a,$N0,$na,$T0a 449 fmadd $T0b,$N0,$nb,$T0b 451 fmadd $T1a,$N0,$nc,$T1a 452 fmadd $T1b,$N0,$nd,$T1b 540 lfd $N0,` [all...] |
H A D | armv8-mont.pl | 295 my ($A0,$A1,$N0,$N1)=map("v$_",(0..3)); 358 ld1 {$N0.4s,$N1.4s},[$nptr],#32 378 umlal @ACC[0].2d,$Ni.2s,$N0.s[0] 379 umlal @ACC[1].2d,$Ni.2s,$N0.s[1] 381 umlal @ACC[2].2d,$Ni.2s,$N0.s[2] 383 umlal @ACC[3].2d,$Ni.2s,$N0.s[3] 416 umlal @ACC[0].2d,$Ni.2s,$N0.s[0] 418 umlal @ACC[1].2d,$Ni.2s,$N0.s[1] 419 umlal @ACC[2].2d,$Ni.2s,$N0.s[2] 423 umlal @ACC[3].2d,$Ni.2s,$N0 [all...] |
/third_party/openssl/crypto/bn/asm/ |
H A D | armv4-mont.pl | 304 my ($N0,$N1,$N2,$N3)=map("d$_",(4..7)); 353 vld1.32 {$N0-$N3}, [$nptr]! 359 vmlal.u32 @ACC[0],$Ni,${N0}[0] 361 vmlal.u32 @ACC[1],$Ni,${N0}[1] 408 vmlal.u32 @ACC[0],$Ni,${N0}[0] 409 vmlal.u32 @ACC[1],$Ni,${N0}[1] 481 vld1.32 {$N0-$N3},[$nptr]! 501 vmlal.u32 @ACC[0],$Ni,${N0}[0] 503 vmlal.u32 @ACC[1],$Ni,${N0}[1] 538 vmlal.u32 @ACC[0],$Ni,${N0}[ [all...] |
H A D | ppc64-mont.pl | 176 $N0="f20"; $N1="f21"; $N2="f22"; $N3="f23"; 401 lfd $N0,`$FRAME+96`($sp) 409 fcfid $N0,$N0 426 stfd $N0,40($nap_d) ; save n[j] in double format 448 fmadd $T0a,$N0,$na,$T0a 449 fmadd $T0b,$N0,$nb,$T0b 451 fmadd $T1a,$N0,$nc,$T1a 452 fmadd $T1b,$N0,$nd,$T1b 540 lfd $N0,` [all...] |
H A D | armv8-mont.pl | 295 my ($A0,$A1,$N0,$N1)=map("v$_",(0..3)); 358 ld1 {$N0.4s,$N1.4s},[$nptr],#32 378 umlal @ACC[0].2d,$Ni.2s,$N0.s[0] 379 umlal @ACC[1].2d,$Ni.2s,$N0.s[1] 381 umlal @ACC[2].2d,$Ni.2s,$N0.s[2] 383 umlal @ACC[3].2d,$Ni.2s,$N0.s[3] 416 umlal @ACC[0].2d,$Ni.2s,$N0.s[0] 418 umlal @ACC[1].2d,$Ni.2s,$N0.s[1] 419 umlal @ACC[2].2d,$Ni.2s,$N0.s[2] 423 umlal @ACC[3].2d,$Ni.2s,$N0 [all...] |
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
H A D | X86ISelDAGToDAG.cpp | 1190 SDValue N0 = N->getOperand(0); in tryOptimizeRem8Extend() 1193 if (!N0.isMachineOpcode() || in tryOptimizeRem8Extend() 1194 N0.getMachineOpcode() != TargetOpcode::EXTRACT_SUBREG || in tryOptimizeRem8Extend() 1195 N0.getConstantOperandVal(1) != X86::sub_8bit) in tryOptimizeRem8Extend() 1201 SDValue N00 = N0.getOperand(0); in tryOptimizeRem8Extend() 1501 SDValue N0 = N.getOperand(0); in matchWrapper() local 1502 if (GlobalAddressSDNode *G = dyn_cast<GlobalAddressSDNode>(N0)) { in matchWrapper() 1506 } else if (ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(N0)) { in matchWrapper() 1511 } else if (ExternalSymbolSDNode *S = dyn_cast<ExternalSymbolSDNode>(N0)) { in matchWrapper() 1514 } else if (auto *S = dyn_cast<MCSymbolSDNode>(N0)) { in matchWrapper() 3519 SDValue N0 = Node->getOperand(0); matchBEXTRFromAndImm() local 3638 SDValue N0 = Node->getOperand(0); emitPCMPISTR() local 3671 SDValue N0 = Node->getOperand(0); emitPCMPESTR() local 4547 SDValue N0 = Node->getOperand(0); Select() local 4596 SDValue N0 = Node->getOperand(0); Select() local 4693 SDValue N0 = Node->getOperand(0); Select() local 4771 SDValue N0 = Node->getOperand(0); Select() local 4862 SDValue N0 = Node->getOperand(0); Select() local 5038 SDValue N0 = Node->getOperand(0); Select() local [all...] |
H A D | X86ISelLowering.cpp | 6730 SDValue N0 = N->getOperand(0); 6733 if (N0.getOpcode() == ISD::EXTRACT_SUBVECTOR && 6734 N0.getOperand(0).getValueType() == VT && 6735 N0.getConstantOperandVal(1) == 0) 6736 Ops.push_back(N0.getOperand(0)); 6741 if (N0.getValueType() == VT || !Ops.empty()) { 7154 SDValue N0 = N.getOperand(0); 7158 if (!getTargetConstantBitsFromNode(IsAndN ? N0 : N1, 8, UndefElts, EltBits)) 7170 Ops.push_back(IsAndN ? N1 : N0); 7212 SDValue N0 [all...] |
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
H A D | AMDGPUISelLowering.cpp | 2612 SDValue N0 = Op.getOperand(0); in LowerFP_TO_FP16() local 2615 if (N0.getValueType() == MVT::f32) in LowerFP_TO_FP16() 2616 return DAG.getNode(AMDGPUISD::FP_TO_FP16, DL, Op.getValueType(), N0); in LowerFP_TO_FP16() 2623 assert(N0.getSimpleValueType() == MVT::f64); in LowerFP_TO_FP16() 2631 SDValue U = DAG.getNode(ISD::BITCAST, DL, MVT::i64, N0); in LowerFP_TO_FP16() 2988 SDValue N0 = N->getOperand(0); in performAssertSZExtCombine() local 2992 if (N0.getOpcode() == ISD::TRUNCATE) { in performAssertSZExtCombine() 2997 SDValue Src = N0.getOperand(0); in performAssertSZExtCombine() 3287 SDValue N0, SDValue N1, unsigned Size, bool Signed) { in getMul24() 3290 return DAG.getNode(MulOpc, SL, MVT::i32, N0, N in getMul24() 3286 getMul24(SelectionDAG &DAG, const SDLoc &SL, SDValue N0, SDValue N1, unsigned Size, bool Signed) getMul24() argument 3321 SDValue N0 = N->getOperand(0); performMulCombine() local 3363 SDValue N0 = N->getOperand(0); performMulhsCombine() local 3387 SDValue N0 = N->getOperand(0); performMulhuCombine() local 3666 SDValue N0 = N->getOperand(0); performFNegCombine() local 3868 SDValue N0 = N->getOperand(0); performFAbsCombine() local [all...] |
H A D | AMDGPUISelDAGToDAG.cpp | 1189 SDValue N0 = Addr.getOperand(0); in SelectDS1Addr1Offset() local 1192 if (isDSOffsetLegal(N0, C1->getSExtValue(), 16)) { in SelectDS1Addr1Offset() 1194 Base = N0; in SelectDS1Addr1Offset() 1264 SDValue N0 = Addr.getOperand(0); in SelectDS64Bit4ByteAligned() local 1270 if (isDSOffsetLegal(N0, DWordOffset1, 8)) { in SelectDS64Bit4ByteAligned() 1271 Base = N0; in SelectDS64Bit4ByteAligned() 1365 SDValue N0 = Addr; in SelectMUBUF() local 1369 N0 = Addr.getOperand(0); in SelectMUBUF() 1374 if (N0.getOpcode() == ISD::ADD) { in SelectMUBUF() 1377 SDValue N2 = N0 in SelectMUBUF() 1530 SDValue N0 = Addr.getOperand(0); SelectMUBUFScratchOffen() local 1661 SDValue N0 = Addr.getOperand(0); SelectFlatOffset() local 1830 SDValue N0 = Addr.getOperand(0); SelectSMRD() local 1894 SDValue N0 = Index.getOperand(0); SelectMOVRELOffset() local [all...] |
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/MSP430/ |
H A D | MSP430ISelDAGToDAG.cpp | 141 SDValue N0 = N.getOperand(0); in MatchWrapper() 143 if (GlobalAddressSDNode *G = dyn_cast<GlobalAddressSDNode>(N0)) { in MatchWrapper() 147 } else if (ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(N0)) { in MatchWrapper() 152 } else if (ExternalSymbolSDNode *S = dyn_cast<ExternalSymbolSDNode>(N0)) { in MatchWrapper() 155 } else if (JumpTableSDNode *J = dyn_cast<JumpTableSDNode>(N0)) { in MatchWrapper() 159 AM.BlockAddr = cast<BlockAddressSDNode>(N0)->getBlockAddress(); in MatchWrapper() 160 //AM.SymbolFlags = cast<BlockAddressSDNode>(N0)->getTargetFlags(); in MatchWrapper()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/XCore/ |
H A D | XCoreISelLowering.cpp | 584 SDValue N0 = Op.getOperand(0); in isADDADDMUL() 588 if (N0.getOpcode() == ISD::ADD) { in isADDADDMUL() 589 AddOp = N0; in isADDADDMUL() 593 OtherOp = N0; in isADDADDMUL() 1635 SDValue N0 = N->getOperand(0); in PerformDAGCombine() local 1638 ConstantSDNode *N0C = dyn_cast<ConstantSDNode>(N0); in PerformDAGCombine() 1640 EVT VT = N0.getValueType(); in PerformDAGCombine() 1644 return DAG.getNode(XCoreISD::LADD, dl, DAG.getVTList(VT, VT), N1, N0, N2); in PerformDAGCombine() 1663 SDValue Result = DAG.getNode(ISD::ADD, dl, VT, N0, N2); in PerformDAGCombine() 1671 SDValue N0 in PerformDAGCombine() local 1708 SDValue N0 = N->getOperand(0); PerformDAGCombine() local [all...] |
/third_party/rust/crates/bindgen/bindgen-tests/tests/headers/ |
H A D | default-macro-constant-type.h | 4 #define N0 0 macro
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
H A D | ARMISelLowering.cpp | 8548 SDNode *N0 = N->getOperand(0).getNode(); in isAddSubSExt() local 8550 return N0->hasOneUse() && N1->hasOneUse() && in isAddSubSExt() 8551 isSignExtended(N0, DAG) && isSignExtended(N1, DAG); in isAddSubSExt() 8559 SDNode *N0 = N->getOperand(0).getNode(); in isAddSubZExt() local 8561 return N0->hasOneUse() && N1->hasOneUse() && in isAddSubZExt() 8562 isZeroExtended(N0, DAG) && isZeroExtended(N1, DAG); in isAddSubZExt() 8573 SDNode *N0 = Op.getOperand(0).getNode(); in LowerMUL() local 8577 bool isN0SExt = isSignExtended(N0, DAG); in LowerMUL() 8582 bool isN0ZExt = isZeroExtended(N0, DAG); in LowerMUL() 8589 if (isN1SExt && isAddSubSExt(N0, DA in LowerMUL() 8673 LowerSDIV_v4i16(SDValue N0, SDValue N1, const SDLoc &dl, SelectionDAG &DAG) LowerSDIV_v4i16() argument 8719 SDValue N0 = Op.getOperand(0); LowerSDIV() local 8756 SDValue N0 = Op.getOperand(0); LowerUDIV() local 11079 SDValue N0 = N->getOperand(0); combineSelectAndUseCommutative() local 11102 AddCombineToVPADD(SDNode *N, SDValue N0, SDValue N1, TargetLowering::DAGCombinerInfo &DCI, const ARMSubtarget *Subtarget) AddCombineToVPADD() argument 11130 AddCombineVUZPToVPADDL(SDNode *N, SDValue N0, SDValue N1, TargetLowering::DAGCombinerInfo &DCI, const ARMSubtarget *Subtarget) AddCombineVUZPToVPADDL() argument 11183 AddCombineBUILD_VECTORToVPADDL(SDNode *N, SDValue N0, SDValue N1, TargetLowering::DAGCombinerInfo &DCI, const ARMSubtarget *Subtarget) AddCombineBUILD_VECTORToVPADDL() argument 11704 PerformADDCombineWithOperands(SDNode *N, SDValue N0, SDValue N1, TargetLowering::DAGCombinerInfo &DCI, const ARMSubtarget *Subtarget) PerformADDCombineWithOperands() argument 11889 SDValue N0 = N->getOperand(0); PerformADDCombine() local 11909 SDValue N0 = N->getOperand(0); PerformSUBCombine() local 11963 SDValue N0 = N->getOperand(0); PerformVMULCombine() local 12291 SDValue N0 = N->getOperand(0); PerformORCombineToBFI() local 12432 SDValue N0 = N->getOperand(0); PerformORCombine_i1() local 12521 SDValue N0 = N->getOperand(0); PerformORCombine() local 13949 SDValue N0 = N->getOperand(0); PerformShiftCombine() local 14028 SDValue N0 = N->getOperand(0); PerformSplittingToWideningLoad() local 14093 SDValue N0 = N->getOperand(0); PerformExtendCombine() local [all...] |
/third_party/rust/crates/bindgen/bindgen-tests/tests/expectations/tests/ |
H A D | fit-macro-constant-types.rs | 8 pub const N0: u8 = 0; consts
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H A D | fit-macro-constant-types-signed.rs | 8 pub const N0: i8 = 0; consts
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H A D | default-macro-constant-type-unsigned.rs | 8 pub const N0: u32 = 0; consts
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H A D | default-macro-constant-type-signed.rs | 8 pub const N0: i32 = 0; consts
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H A D | default-macro-constant-type.rs | 8 pub const N0: u32 = 0; consts
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
H A D | AArch64ISelLowering.cpp | 2834 SDNode *N0 = N->getOperand(0).getNode(); in isAddSubSExt() local 2836 return N0->hasOneUse() && N1->hasOneUse() && in isAddSubSExt() 2837 isSignExtended(N0, DAG) && isSignExtended(N1, DAG); in isAddSubSExt() 2845 SDNode *N0 = N->getOperand(0).getNode(); in isAddSubZExt() local 2847 return N0->hasOneUse() && N1->hasOneUse() && in isAddSubZExt() 2848 isZeroExtended(N0, DAG) && isZeroExtended(N1, DAG); in isAddSubZExt() 2879 SDNode *N0 = Op.getOperand(0).getNode(); in LowerMUL() local 2883 bool isN0SExt = isSignExtended(N0, DAG); in LowerMUL() 2888 bool isN0ZExt = isZeroExtended(N0, DAG); in LowerMUL() 2895 if (isN1SExt && isAddSubSExt(N0, DA in LowerMUL() 7965 SDValue N0 = N->getOperand(0); LowerBUILD_VECTOR() local 9655 SDValue N0 = N->getOperand(0); performIntegerAbsCombine() local 9706 SDValue N0 = N->getOperand(0); BuildSDIVPow2() local 10350 SDValue N0 = N->getOperand(0), N1 = N->getOperand(1); performConcatVectorsCombine() local 12187 SDValue N0 = N->getOperand(0); performVSelectCombine() local 12218 SDValue N0 = N->getOperand(0); performSelectCombine() local [all...] |