Searched refs:Muls (Results 1 - 4 of 4) sorted by relevance
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| H A D | ARMParallelDSP.cpp | 87 MulCandList Muls; member in __anon24536::Reduction
117 Muls.push_back(std::make_unique<MulCandidate>(I, LHS, RHS)); in InsertMuls()
173 MulCandList &getMuls() { return Muls; } in getMuls()
188 for (auto &Mul : Muls) in dump()
597 MulCandList &Muls = R.getMuls(); in CreateParallelPairs() local
598 const unsigned Elems = Muls.size(); in CreateParallelPairs()
600 MulCandidate *PMul0 = static_cast<MulCandidate*>(Muls[i].get()); in CreateParallelPairs()
608 MulCandidate *PMul1 = static_cast<MulCandidate*>(Muls[j].get()); in CreateParallelPairs()
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| /third_party/vixl/test/aarch32/ |
| H A D | test-simulator-cond-rdlow-rnlow-rmlow-t32.cc | 117 M(Muls)
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| H A D | test-simulator-cond-rd-rn-rm-a32.cc | 117 M(Muls) \
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| /third_party/vixl/src/aarch32/ |
| H A D | macro-assembler-aarch32.h | 3044 Muls(cond, rd, rn, rm); in MacroAssembler()
3050 Muls(cond, rd, rn, rm); in MacroAssembler()
3061 void Muls(Condition cond, Register rd, Register rn, Register rm) { in MacroAssembler() function in vixl::aarch32::MacroAssembler
3075 void Muls(Register rd, Register rn, Register rm) { Muls(al, rd, rn, rm); } in MacroAssembler() function in vixl::aarch32::MacroAssembler
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