| /third_party/vixl/test/aarch64/ |
| H A D | test-disasm-sve-aarch64.cc | 2838 COMPARE_MACRO(Mls(z0.VnD(), p1.Merging(), z0.VnD(), z2.VnD(), z4.VnD()), in TEST()
2840 COMPARE_MACRO(Mls(z3.VnS(), p2.Merging(), z4.VnS(), z3.VnS(), z5.VnS()), in TEST()
2842 COMPARE_MACRO(Mls(z4.VnH(), p3.Merging(), z5.VnH(), z6.VnH(), z4.VnH()), in TEST()
2844 COMPARE_MACRO(Mls(z5.VnB(), p4.Merging(), z6.VnB(), z7.VnB(), z8.VnB()), in TEST()
8054 COMPARE_MACRO(Mls(z1.VnH(), z1.VnH(), z9.VnH(), z0.VnH(), 0), in TEST()
8056 COMPARE_MACRO(Mls(z1.VnH(), z1.VnH(), z9.VnH(), z1.VnH(), 2), in TEST()
8058 COMPARE_MACRO(Mls(z1.VnH(), z1.VnH(), z9.VnH(), z2.VnH(), 6), in TEST()
8060 COMPARE_MACRO(Mls(z1.VnH(), z1.VnH(), z9.VnH(), z3.VnH(), 7), in TEST()
8062 COMPARE_MACRO(Mls(z10.VnS(), z10.VnS(), z22.VnS(), z7.VnS(), 0), in TEST()
8064 COMPARE_MACRO(Mls(z1 in TEST()
[all...] |
| H A D | test-disasm-neon-aarch64.cc | 1705 COMPARE_MACRO(Mls(v19.M, v20.M, v21.M), "mls v19." S ", v20." S ", v21." S); in TEST()
2268 COMPARE_MACRO(Mls(v0.V4H(), v1.V4H(), v2.H(), 0), in TEST()
2270 COMPARE_MACRO(Mls(v2.V8H(), v3.V8H(), v15.H(), 7), in TEST()
2272 COMPARE_MACRO(Mls(v0.V2S(), v1.V2S(), v2.S(), 0), in TEST()
2274 COMPARE_MACRO(Mls(v2.V4S(), v3.V4S(), v15.S(), 3), in TEST()
2276 COMPARE_MACRO(Mls(v11.V2S(), v17.V2S(), v31.S(), 1), in TEST()
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| H A D | test-assembler-neon-aarch64.cc | 4382 __ Mls(v17.V16B(), v0.V16B(), v1.V16B()); in TEST()
4449 __ Mls(v24.V4H(), v0.V4H(), v1.H(), 0); in TEST()
4450 __ Mls(v25.V8H(), v0.V8H(), v1.H(), 7); in TEST()
4454 __ Mls(v26.V2S(), v0.V2S(), v1.S(), 0); in TEST()
4455 __ Mls(v27.V4S(), v0.V4S(), v1.S(), 3); in TEST()
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| H A D | test-assembler-sve-aarch64.cc | 419 // The Mls macro automatically selects between mls, msb and movprfx + mls
427 __ Mls(mls_da_result, p0.Merging(), mls_da_result, zn, zm);
430 __ Mls(mls_dn_result, p1.Merging(), za, mls_dn_result, zm);
433 __ Mls(mls_dm_result, p2.Merging(), za, zn, mls_dm_result);
436 __ Mls(mls_d_result, p3.Merging(), za, zn, zm);
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| /third_party/node/deps/v8/src/codegen/arm64/ |
| H A D | macro-assembler-arm64.h | 221 V(mls, Mls) \
389 V(mls, Mls) \
|
| /third_party/skia/third_party/externals/swiftshader/third_party/subzero/src/ |
| H A D | IceInstARM32.h | 401 Mls, enumerator
1064 using InstARM32Mls = InstARM32FourAddrGPR<InstARM32::Mls>;
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| H A D | IceInstARM32.cpp | 3457 template class InstARM32FourAddrGPR<InstARM32::Mls>;
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| /third_party/vixl/src/aarch64/ |
| H A D | macro-assembler-sve-aarch64.cc | 993 void MacroAssembler::Mls(const ZRegister& zd, in Mls() function in vixl::aarch64::MacroAssembler
1863 V(Mls, mls, FourRegOneImmDestructiveHelper) \
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| H A D | macro-assembler-aarch64.h | 2887 V(mls, Mls) \
3116 V(mls, Mls) \
5529 void Mls(const ZRegister& zd,
6783 void Mls(const ZRegister& zd,
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| /third_party/node/deps/v8/src/codegen/arm/ |
| H A D | macro-assembler-arm.h | 627 void Mls(Register dst, Register src1, Register src2, Register srcA,
|
| H A D | macro-assembler-arm.cc | 542 void MacroAssembler::Mls(Register dst, Register src1, Register src2, in Mls() function in v8::internal::MacroAssembler
|
| /third_party/node/deps/v8/src/compiler/backend/arm64/ |
| H A D | code-generator-arm64.cc | 2178 SIMD_DESTRUCTIVE_BINOP_LANE_SIZE_CASE(kArm64Mls, Mls); in AssembleArchInstruction()
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| /third_party/vixl/src/aarch32/ |
| H A D | macro-assembler-aarch32.h | 2854 void Mls(Condition cond, Register rd, Register rn, Register rm, Register ra) { in MacroAssembler() function in vixl::aarch32::MacroAssembler
2869 void Mls(Register rd, Register rn, Register rm, Register ra) { in MacroAssembler() function in vixl::aarch32::MacroAssembler
2870 Mls(al, rd, rn, rm, ra); in MacroAssembler()
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