Searched refs:MUL_D (Results 1 - 12 of 12) sorted by relevance
| /third_party/node/deps/v8/src/compiler/backend/mips/ |
| H A D | instruction-scheduler-mips.cc | 488 MUL_D = 5, enumerator
703 return Latency::MUL_D + Latency::ADD_D; in MaddSLatency()
711 return Latency::MUL_D + Latency::ADD_D; in MaddDLatency()
727 return Latency::MUL_D + Latency::SUB_D; in MsubDLatency()
1780 return Latency::MUL_D; in GetInstructionLatency()
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| /third_party/node/deps/v8/src/compiler/backend/riscv64/ |
| H A D | instruction-scheduler-riscv64.cc | 518 MUL_D = 5, enumerator
1322 return Latency::MUL_D; in GetInstructionLatency()
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| /third_party/node/deps/v8/src/codegen/loong64/ |
| H A D | constants-loong64.h | 359 MUL_D = 0x3bU << 15,
1097 case MUL_D:
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| H A D | assembler-loong64.cc | 1158 GenRegister(MUL_D, rk, rj, rd); in mul_d()
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| /third_party/node/deps/v8/src/compiler/backend/mips64/ |
| H A D | instruction-scheduler-mips64.cc | 517 MUL_D = 5, enumerator
1518 return Latency::MUL_D; in GetInstructionLatency()
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| /third_party/node/deps/v8/src/codegen/mips64/ |
| H A D | constants-mips64.h | 684 MUL_D = ((0U << 3) + 2),
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| H A D | assembler-mips64.cc | 2820 GenInstrRegister(COP1, S, ft, fs, fd, MUL_D); in mul_s()
2824 GenInstrRegister(COP1, D, ft, fs, fd, MUL_D); in mul_d()
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| /third_party/node/deps/v8/src/codegen/mips/ |
| H A D | constants-mips.h | 639 MUL_D = ((0U << 3) + 2),
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| H A D | assembler-mips.cc | 2553 GenInstrRegister(COP1, D, ft, fs, fd, MUL_D); in mul_d()
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| /third_party/node/deps/v8/src/execution/loong64/ |
| H A D | simulator-loong64.cc | 3618 case MUL_D:
3619 printf_instr("MUL_D\t %s: %016lx, %s, %016lx, %s, %016lx\n",
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| /third_party/node/deps/v8/src/execution/mips64/ |
| H A D | simulator-mips64.cc | 3187 case MUL_D: in DecodeTypeRegisterDRsType()
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| /third_party/node/deps/v8/src/execution/mips/ |
| H A D | simulator-mips.cc | 2806 case MUL_D: in DecodeTypeRegisterDRsType()
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