Searched refs:MUBUF (Results 1 - 11 of 11) sorted by relevance
| /third_party/mesa3d/src/amd/compiler/ |
| H A D | aco_opt_value_numbering.cpp | 106 case Format::MUBUF: return hash_murmur_32<MUBUF_instruction>(instr); in operator ()()
260 case Format::MUBUF: { in operator ()()
348 case Format::MUBUF: in can_eliminate()
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| H A D | aco_opcodes.py | 62 MUBUF = 10 variable in Format
107 elif self == Format.MUBUF:
1290 # MUBUF instructions:
1291 MUBUF = { variable
1373 for (gfx6, gfx7, gfx8, gfx9, gfx10, name) in MUBUF:
1374 opcode(name, gfx7, gfx9, gfx10, Format.MUBUF, InstrClass.VMem, is_atomic = "atomic" in name)
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| H A D | aco_ir.h | 82 MUBUF = 10, member in aco::Format
1148 constexpr bool isMUBUF() const noexcept { return format == Format::MUBUF; }
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| H A D | aco_assembler.cpp | 378 case Format::MUBUF: { in emit_instruction()
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| H A D | aco_insert_waitcnt.cpp | 684 case Format::MUBUF: in gen()
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| H A D | aco_ir.cpp | 191 case Format::MUBUF: return instr->mubuf().sync; in get_sync_info()
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| H A D | aco_print_ir.cpp | 366 case Format::MUBUF: { in print_instr_format_specific()
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| H A D | aco_validate.cpp | 565 case Format::MUBUF: { in validate_ir()
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| H A D | aco_instruction_selection.cpp | 4436 aco_ptr<MUBUF_instruction> mubuf{create_instruction<MUBUF_instruction>(op, Format::MUBUF, 3, 1)};
4546 max_const_offset_plus_one = 4096; /* MUBUF has a 12-bit unsigned offset field */
4572 /* GFX6 (MUBUF): (SGPR address, SGPR offset) or (VGPR address, SGPR offset) */
4650 create_instruction<MUBUF_instruction>(op, Format::MUBUF, 3, 1)};
5553 /* use MUBUF when possible to avoid possible alignment issues */
6273 create_instruction<MUBUF_instruction>(opcode, Format::MUBUF, 3 + is_sparse, 1)};
6364 create_instruction<MUBUF_instruction>(opcode, Format::MUBUF, 4, 0)};
6529 is_64bit ? buf_op64 : buf_op, Format::MUBUF, 4, return_previous ? 1 : 0)};
6729 create_instruction<MUBUF_instruction>(op, Format::MUBUF, 4, 0)};
6818 create_instruction<MUBUF_instruction>(op, Format::MUBUF,
[all...] |
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| H A D | SIDefines.h | 45 MUBUF = 1 << 16,
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| H A D | SIInstrInfo.h | 446 return MI.getDesc().TSFlags & SIInstrFlags::MUBUF; in isMUBUF()
450 return get(Opcode).TSFlags & SIInstrFlags::MUBUF; in isMUBUF()
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