Searched refs:MSUB (Results 1 - 8 of 8) sorted by relevance
| /third_party/node/deps/v8/src/codegen/riscv64/ |
| H A D | constants-riscv64.cc | 221 case MSUB: in InstructionType()
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| H A D | constants-riscv64.h | 393 MSUB = 0b1000111, // R4 type: FMSUB.S FMSUB.D FMSUB.Q
525 RO_FMSUB_S = MSUB | (0b00 << kFunct2Shift),
560 RO_FMSUB_D = MSUB | (0b01 << kFunct2Shift),
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| H A D | assembler-riscv64.cc | 1966 GenInstrR4(0b00, MSUB, rd, rs1, rs2, rs3, frm); in fmsub_s()
2098 GenInstrR4(0b01, MSUB, rd, rs1, rs2, rs3, frm); in fmsub_d()
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| /third_party/node/deps/v8/src/compiler/backend/mips/ |
| H A D | instruction-scheduler-mips.cc | 405 MSUB = 4, enumerator
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| /third_party/node/deps/v8/src/codegen/arm64/ |
| H A D | constants-arm64.h | 1105 MSUB = MSUB_w,
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| H A D | assembler-arm64.cc | 1103 DataProcessing3Source(rd, rn, rm, zr, MSUB); in mneg()
1109 DataProcessing3Source(rd, rn, rm, ra, MSUB); in msub()
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| /third_party/vixl/src/aarch64/ |
| H A D | constants-aarch64.h | 1500 MSUB = MSUB_w, enumerator
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| H A D | assembler-aarch64.cc | 917 DataProcessing3Source(rd, rn, rm, AppropriateZeroRegFor(rd), MSUB); in mneg()
925 DataProcessing3Source(rd, rn, rm, ra, MSUB); in msub()
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