Searched refs:MFHC1 (Results 1 - 8 of 8) sorted by relevance
| /third_party/node/deps/v8/src/compiler/backend/mips/ |
| H A D | instruction-scheduler-mips.cc | 516 MFHC1 = 1, enumerator
857 return Latency::MFHC1 + Latency::MTC1 + Latency::MTHC1; in FmoveLowLatency()
1223 Latency::MFHC1 + 2 * Move_dLatency(); in Float64MaxLatency()
1617 return Latency::MFHC1 + Latency::MTC1 + Latency::MTHC1; in GetInstructionLatency()
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| /third_party/node/deps/v8/src/compiler/backend/mips64/ |
| H A D | instruction-scheduler-mips64.cc | 542 MFHC1 = 1, enumerator
1617 return Latency::MFHC1 + Latency::MTC1 + Latency::MTHC1; in GetInstructionLatency()
1619 return Latency::MFHC1; in GetInstructionLatency()
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| /third_party/node/deps/v8/src/codegen/mips64/ |
| H A D | constants-mips64.h | 643 MFHC1 = ((0U << 3) + 3) << 21,
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| H A D | assembler-mips64.cc | 2695 GenInstrRegister(COP1, MFHC1, rt, fs, f0); in mfhc1()
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| /third_party/node/deps/v8/src/codegen/mips/ |
| H A D | constants-mips.h | 598 MFHC1 = ((0U << 3) + 3) << 21,
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| H A D | assembler-mips.cc | 2424 GenInstrRegister(COP1, MFHC1, rt, fs, f0); in mfhc1()
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| /third_party/node/deps/v8/src/execution/mips64/ |
| H A D | simulator-mips64.cc | 3635 case MFHC1: in DecodeTypeRegisterCOP1()
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| /third_party/node/deps/v8/src/execution/mips/ |
| H A D | simulator-mips.cc | 3682 case MFHC1: in DecodeTypeRegisterCOP1()
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