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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/
H A DLiveRangeCalc.h74 /// By convention, EntryInfoMap[&LR] = { Defined, Undefined }.
102 LiveRange &LR; member
116 LiveInBlock(LiveRange &LR, MachineDomTreeNode *node, SlotIndex kill) in LiveInBlock()
117 : LR(LR), DomNode(node), Kill(kill) {} in LiveInBlock()
127 /// in @p LR. Return true if none of the defs reach the entry to @p MBB.
128 bool isDefOnEntry(LiveRange &LR, ArrayRef<SlotIndex> Undefs,
136 /// all paths from the def to @p UseMBB are added to @p LR, and the function
139 /// If multiple values can reach @p UseMBB, the blocks that need @p LR to be
142 /// The array @p Undef provides the locations where the range @p LR become
222 extendToUses(LiveRange &LR, unsigned PhysReg) extendToUses() argument
269 addLiveInBlock(LiveRange &LR, MachineDomTreeNode *DomNode, SlotIndex Kill = SlotIndex()) addLiveInBlock() argument
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H A DLiveIntervals.h172 /// Extend the live range \p LR to reach all points in \p Indices. The
174 /// of the existing defs in \p LR and points in \p Undefs.
178 /// If a SlotIndex in \p Indices is the end index of a basic block, \p LR
184 void extendToIndices(LiveRange &LR, ArrayRef<SlotIndex> Indices,
187 void extendToIndices(LiveRange &LR, ArrayRef<SlotIndex> Indices) { in extendToIndices() argument
188 extendToIndices(LR, Indices, /*Undefs=*/{}); in extendToIndices()
191 /// If \p LR has a live value at \p Kill, prune its live range by removing
198 void pruneValue(LiveRange &LR, SlotIndex Kill,
245 bool isLiveInToMBB(const LiveRange &LR, in isLiveInToMBB() argument
247 return LR in isLiveInToMBB()
250 isLiveOutOfMBB(const LiveRange &LR, const MachineBasicBlock *mbb) const isLiveOutOfMBB() argument
394 LiveRange *LR = RegUnitRanges[Unit]; getRegUnit() local
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H A DLiveIntervalUnion.h111 const LiveRange *LR = nullptr; member in llvm::LiveIntervalUnion::Query
112 LiveRange::const_iterator LRI; ///< current position in LR
123 LR = &NewLR; in reset()
133 Query(const LiveRange &LR, const LiveIntervalUnion &LIU): in Query() argument
134 LiveUnion(&LIU), LR(&LR) {} in Query()
140 if (UserTag == NewUserTag && LR == &NewLR && LiveUnion == &NewLiveUnion && in init()
H A DLiveInterval.h672 inline raw_ostream &operator<<(raw_ostream &OS, const LiveRange &LR) {
673 LR.print(OS);
928 LiveRange *LR;
936 /// Create a LiveRangeUpdater for adding segments to LR.
937 /// LR will temporarily be in an invalid state until flush() is called.
938 LiveRangeUpdater(LiveRange *lr = nullptr) : LR(lr) {}
942 /// Add a segment to LR and coalesce when possible, just like
943 /// LR.addSegment(). Segments should be added in increasing start order for
951 /// Return true if the LR is currently in an invalid state, and flush()
955 /// Flush the updater state to LR s
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/third_party/libunwind/libunwind/src/arm/
H A DGstash_frame.c44 rs->reg.where[LR], rs->reg.val[LR], DWARF_GET_LOC(d->loc[LR]), in tdep_stash_frame()
49 - Return address is saved in LR; in tdep_stash_frame()
51 - LR is unsaved or saved at CFA+offset, offset != -1; in tdep_stash_frame()
58 && rs->ret_addr_column == LR in tdep_stash_frame()
64 && (rs->reg.where[LR] == DWARF_WHERE_UNDEF in tdep_stash_frame()
65 || rs->reg.where[LR] == DWARF_WHERE_SAME in tdep_stash_frame()
66 || (rs->reg.where[LR] == DWARF_WHERE_CFAREL in tdep_stash_frame()
67 && labs(rs->reg.val[LR]) < ( in tdep_stash_frame()
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/third_party/libunwind/libunwind/src/aarch64/
H A DGstash_frame.c44 rs->reg.where[LR], rs->reg.val[LR], DWARF_GET_LOC(d->loc[LR]), in tdep_stash_frame()
49 - Return address is saved in LR; in tdep_stash_frame()
51 - LR is unsaved or saved at CFA+offset, offset != -1; in tdep_stash_frame()
58 && rs->ret_addr_column == LR in tdep_stash_frame()
64 && (rs->reg.where[LR] == DWARF_WHERE_UNDEF in tdep_stash_frame()
65 || rs->reg.where[LR] == DWARF_WHERE_SAME in tdep_stash_frame()
66 || (rs->reg.where[LR] == DWARF_WHERE_CFAREL in tdep_stash_frame()
67 && labs(rs->reg.val[LR]) < ( in tdep_stash_frame()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/
H A DLiveRangeUtils.h21 /// corresponding segments of a master live range \p LR to a list of newly
23 /// LR to 0 meaning it should stay or to 1..N meaning it should go to a specific
26 static void DistributeRange(LiveRangeT &LR, LiveRangeT *SplitLRs[], in DistributeRange() argument
29 typename LiveRangeT::iterator J = LR.begin(), E = LR.end(); in DistributeRange()
40 LR.segments.erase(J, E); in DistributeRange()
43 unsigned j = 0, e = LR.getNumValNums(); in DistributeRange()
47 VNInfo *VNI = LR.getValNumInfo(i); in DistributeRange()
53 LR.valnos[j++] = VNI; in DistributeRange()
56 LR in DistributeRange()
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H A DLiveInterval.cpp67 LiveRange *LR; member in __anon24032::CalcLiveRangeUtilBase
70 CalcLiveRangeUtilBase(LiveRange *LR) : LR(LR) {} in CalcLiveRangeUtilBase() argument
94 VNInfo *VNI = ForVNI ? ForVNI : LR->getNextValue(Def, *VNInfoAllocator); in createDeadDef()
115 VNInfo *VNI = ForVNI ? ForVNI : LR->getNextValue(Def, *VNInfoAllocator); in createDeadDef()
142 return std::make_pair(nullptr, LR->isUndefIn(Undefs, StartIdx, BeforeUse)); in extendInBlock()
145 return std::make_pair(nullptr, LR->isUndefIn(Undefs, StartIdx, BeforeUse)); in extendInBlock()
147 if (LR->isUndefIn(Undefs, I->end, BeforeUse)) in extendInBlock()
288 CalcLiveRangeUtilVector(LiveRange *LR) argument
314 CalcLiveRangeUtilSet(LiveRange *LR) CalcLiveRangeUtilSet() argument
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H A DRegAllocFast.cpp192 void killVirtReg(LiveReg &LR);
194 void spillVirtReg(MachineBasicBlock::iterator MI, LiveReg &LR);
211 void allocVirtReg(MachineInstr &MI, LiveReg &LR, Register Hint);
369 void RegAllocFast::addKillFlag(const LiveReg &LR) { in addKillFlag() argument
370 if (!LR.LastUse) return; in addKillFlag()
371 MachineOperand &MO = LR.LastUse->getOperand(LR.LastOpNum); in addKillFlag()
372 if (MO.isUse() && !LR.LastUse->isRegTiedToDefOperand(LR.LastOpNum)) { in addKillFlag()
373 if (MO.getReg() == LR in addKillFlag()
388 killVirtReg(LiveReg &LR) killVirtReg() argument
418 spillVirtReg(MachineBasicBlock::iterator MI, LiveReg &LR) spillVirtReg() argument
611 assignVirtToPhysReg(LiveReg &LR, MCPhysReg PhysReg) assignVirtToPhysReg() argument
662 allocVirtReg(MachineInstr &MI, LiveReg &LR, Register Hint0) allocVirtReg() argument
931 LiveReg &LR = reloadVirtReg(MI, I, Reg, 0); handleThroughOperands() local
940 LiveReg &LR = reloadVirtReg(MI, I, Reg, 0); handleThroughOperands() local
1112 LiveReg &LR = reloadVirtReg(MI, I, Reg, CopyDstReg); allocateInstruction() local
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H A DLiveRangeCalc.cpp65 LiveRange &LR, const MachineOperand &MO) { in createDeadDef()
70 // Create the def in LR. This may find an existing def. in createDeadDef()
71 LR.createDeadDef(DefIdx, Alloc); in createDeadDef()
147 void LiveRangeCalc::createDeadDefs(LiveRange &LR, unsigned Reg) { in createDeadDefs() argument
151 // LR.createDeadDef() will deduplicate. in createDeadDefs()
153 createDeadDef(*Indexes, *Alloc, LR, MO); in createDeadDefs()
156 void LiveRangeCalc::extendToUses(LiveRange &LR, unsigned Reg, LaneBitmask Mask, in extendToUses() argument
212 extend(LR, UseIdx, Reg, Undefs); in extendToUses()
235 Updater.setDest(&I.LR); in updateFromLiveIns()
241 void LiveRangeCalc::extend(LiveRange &LR, SlotInde argument
64 createDeadDef(SlotIndexes &Indexes, VNInfo::Allocator &Alloc, LiveRange &LR, const MachineOperand &MO) createDeadDef() argument
276 isDefOnEntry(LiveRange &LR, ArrayRef<SlotIndex> Undefs, MachineBasicBlock &MBB, BitVector &DefOnEntry, BitVector &UndefOnEntry) isDefOnEntry() argument
346 findReachingDefs(LiveRange &LR, MachineBasicBlock &UseMBB, SlotIndex Use, unsigned PhysReg, ArrayRef<SlotIndex> Undefs) findReachingDefs() argument
553 LiveRange &LR = I.LR; updateSSA() local
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H A DLiveIntervals.cpp117 for (LiveRange *LR : RegUnitRanges) in releaseMemory()
118 delete LR; in releaseMemory()
159 if (LiveRange *LR = RegUnitRanges[Unit]) in print()
160 OS << printRegUnit(Unit, TRI) << ' ' << *LR << '\n'; in print()
268 void LiveIntervals::computeRegUnitRange(LiveRange &LR, unsigned Unit) { in computeRegUnitRange() argument
284 LRCalc->createDeadDefs(LR, Reg); in computeRegUnitRange()
295 // Now extend LR to reach all uses. in computeRegUnitRange()
303 LRCalc->extendToUses(LR, Reg); in computeRegUnitRange()
310 LR.flushSegmentSet(); in computeRegUnitRange()
335 LiveRange *LR in computeLiveInRegUnits() local
355 createSegmentsForValues(LiveRange &LR, iterator_range<LiveInterval::vni_iterator> VNIs) createSegmentsForValues() argument
623 extendToIndices(LiveRange &LR, ArrayRef<SlotIndex> Indices, ArrayRef<SlotIndex> Undefs) extendToIndices() argument
632 pruneValue(LiveRange &LR, SlotIndex Kill, SmallVectorImpl<SlotIndex> *EndPoints) pruneValue() argument
1032 updateRange(LiveRange &LR, unsigned Reg, LaneBitmask LaneMask) updateRange() argument
1056 handleMoveDown(LiveRange &LR) handleMoveDown() argument
1229 handleMoveUp(LiveRange &LR, unsigned Reg, LaneBitmask LaneMask) handleMoveUp() argument
1492 repairOldRegInRange(const MachineBasicBlock::iterator Begin, const MachineBasicBlock::iterator End, const SlotIndex endIdx, LiveRange &LR, const unsigned Reg, LaneBitmask LaneMask) repairOldRegInRange() argument
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H A DMachineVerifier.cpp251 void report_context(const LiveRange &LR, unsigned VRegUnit,
257 void report_context_liverange(const LiveRange &LR) const;
266 SlotIndex UseIdx, const LiveRange &LR, unsigned VRegOrUnit,
269 SlotIndex DefIdx, const LiveRange &LR, unsigned VRegOrUnit,
527 void MachineVerifier::report_context(const LiveRange &LR, unsigned VRegUnit, in report_context() argument
529 report_context_liverange(LR); in report_context()
543 void MachineVerifier::report_context_liverange(const LiveRange &LR) const { in report_context_liverange()
544 errs() << "- liverange: " << LR << '\n'; in report_context_liverange()
1870 unsigned MONum, SlotIndex UseIdx, const LiveRange &LR, unsigned VRegOrUnit, in checkLivenessAtUse()
1872 LiveQueryResult LRQ = LR in checkLivenessAtUse()
1869 checkLivenessAtUse(const MachineOperand *MO, unsigned MONum, SlotIndex UseIdx, const LiveRange &LR, unsigned VRegOrUnit, LaneBitmask LaneMask) checkLivenessAtUse() argument
1891 checkLivenessAtDef(const MachineOperand *MO, unsigned MONum, SlotIndex DefIdx, const LiveRange &LR, unsigned VRegOrUnit, bool SubRangeCheck, LaneBitmask LaneMask) checkLivenessAtDef() argument
2385 verifyLiveRangeValue(const LiveRange &LR, const VNInfo *VNI, unsigned Reg, LaneBitmask LaneMask) verifyLiveRangeValue() argument
2477 verifyLiveRangeSegment(const LiveRange &LR, const LiveRange::const_iterator I, unsigned Reg, LaneBitmask LaneMask) verifyLiveRangeSegment() argument
2692 verifyLiveRange(const LiveRange &LR, unsigned Reg, LaneBitmask LaneMask) verifyLiveRange() argument
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H A DLiveRegMatrix.cpp178 LiveIntervalUnion::Query &LiveRegMatrix::query(const LiveRange &LR, in query() argument
181 Q.init(UserTag, LR, Matrix[RegUnit]); in query()
200 [&](unsigned Unit, const LiveRange &LR) { in checkInterference()
201 return query(LR, Unit).checkInterference(); in checkInterference()
214 LiveRange LR; in checkInterference() local
215 LR.addSegment(Seg); in checkInterference()
219 if (query(LR, *Units).checkInterference()) in checkInterference()
H A DRegisterCoalescer.cpp1484 if (LiveRange *LR = LIS->getCachedRegUnit(*Units)) in reMaterializeTrivialDef()
1485 LR->createDeadDef(NewMIIdx.getRegSlot(), LIS->getVNInfoAllocator()); in reMaterializeTrivialDef()
1499 if (LiveRange *LR = LIS->getCachedRegUnit(*Units)) in reMaterializeTrivialDef()
1500 LR->createDeadDef(NewMIIdx.getRegSlot(), LIS->getVNInfoAllocator()); in reMaterializeTrivialDef()
2115 LiveRange &LR = LIS->getRegUnit(*UI); in joinReservedPhysReg() local
2116 LR.createDeadDef(DestRegIdx, LIS->getVNInfoAllocator()); in joinReservedPhysReg()
2200 LiveRange &LR; member in __anon24096::JoinVals
2341 /// Assuming ValNo is going to clobber some valid lanes in Other.LR, compute
2344 /// Multiple values in Other.LR can be affected since partial redefinitions
2364 /// Determine if ValNo is a copy of a value number in LR o
2373 JoinVals(LiveRange &LR, unsigned Reg, unsigned SubIdx, LaneBitmask LaneMask, SmallVectorImpl<VNInfo*> &newVNInfo, const CoalescerPair &cp, LiveIntervals *lis, const TargetRegisterInfo *TRI, bool SubRangeJoin, bool TrackSubRegLiveness) JoinVals() argument
3011 << Def << ": " << LR << '\\n'); pruneValues() local
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H A DLiveIntervalUnion.cpp128 if (LR->empty() || LiveUnion->empty()) { in collectInterferingVRegs()
133 // In most cases, the union will start before LR. in collectInterferingVRegs()
134 LRI = LR->begin(); in collectInterferingVRegs()
139 LiveRange::const_iterator LREnd = LR->end(); in collectInterferingVRegs()
142 assert(LRI != LREnd && "Reached end of LR"); in collectInterferingVRegs()
166 LRI = LR->advanceTo(LRI, LiveUnionI.start()); in collectInterferingVRegs()
H A DInterferenceCache.cpp237 LiveRange *LR = RegUnits[i].Fixed; in update() local
238 if (I == LR->end() || I->start >= Stop) in update()
240 I = LR->advanceTo(I, Stop); in update()
241 bool Backup = I == LR->end() || I->start >= Stop; in update()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/DebugInfo/GSYM/
H A DFunctionInfo.cpp155 LookupResult LR; in lookup() local
156 LR.LookupAddr = Addr; in lookup()
157 LR.FuncRange.Start = FuncAddr; in lookup()
159 LR.FuncRange.End = FuncAddr + Data.getU32(&Offset); in lookup()
170 if (Addr >= LR.FuncRange.End) in lookup()
178 LR.FuncName = GR.getString(NameOffset); in lookup()
222 SrcLoc.Name = LR.FuncName; in lookup()
223 LR.Locations.push_back(SrcLoc); in lookup()
224 return LR; in lookup()
234 SrcLoc.Name = LR in lookup()
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H A DLookupResult.cpp54 raw_ostream &llvm::gsym::operator<<(raw_ostream &OS, const LookupResult &LR) { in operator <<() argument
55 OS << HEX64(LR.LookupAddr) << ": "; in operator <<()
56 auto NumLocations = LR.Locations.size(); in operator <<()
63 OS << LR.Locations[I]; in operator <<()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/ExecutionEngine/Orc/
H A DLambdaResolver.h65 using LR = LambdaResolver<DylibLookupFtorT, ExternalLookupFtorT>; in createLambdaResolver()
66 return std::make_unique<LR>(std::move(DylibLookupFtor), in createLambdaResolver()
75 using LR = LambdaResolver<DylibLookupFtorT, ExternalLookupFtorT>; in createLambdaResolver()
76 return std::make_unique<LR>(AcknowledgeORCv1Deprecation, in createLambdaResolver()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/
H A DThumb1FrameLowering.cpp223 case ARM::LR: in emitPrologue()
288 case ARM::LR: in emitPrologue()
464 return ((ARM::tGPRRegClass.contains(Src) || Src == ARM::LR) && in isCSRestore()
572 // LR cannot be encoded with Thumb1, i.e., it requires a special fix-up. in needPopSpecialFixUp()
574 if (CSI.getReg() == ARM::LR) in needPopSpecialFixUp()
611 // LR in the PC. in emitPopSpecialFixUp()
615 // and copy that value into LR. in emitPopSpecialFixUp()
681 // restoring LR. in emitPopSpecialFixUp()
691 GPRsNoLRSP.reset(ARM::LR); in emitPopSpecialFixUp()
696 // If we couldn't find a pop-friendly register, try restoring LR befor in emitPopSpecialFixUp()
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H A DARMFrameLowering.cpp437 case ARM::LR: in emitPrologue()
644 case ARM::LR: in emitPrologue()
1088 if (Reg == ARM::LR && !isTailCall && !isVarArg && !isInterrupt && in emitPopInst()
1095 // We 'restore' LR into PC so it is not live out of the return block: in emitPopInst()
1133 // If we adjusted the reg to PC from LR above, switch it back here. We in emitPopInst()
1136 Regs[0] = ARM::LR; in emitPopInst()
1668 // If a stack probe will be emitted, spill R4 and LR, since they are in determineCalleeSaves()
1676 SavedRegs.set(ARM::LR); in determineCalleeSaves()
1680 // Spill LR if Thumb1 function uses variable length argument lists. in determineCalleeSaves()
1682 SavedRegs.set(ARM::LR); in determineCalleeSaves()
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H A DARMLowOverheadLoops.cpp161 // Is it safe to define LR with DLS/WLS?
162 // LR can be defined if it is the operand to start, because it's the same
265 // We can define LR because LR already contains the same value. in IsSafeToDefineLR()
266 if (Start->getOperand(0).getReg() == ARM::LR) in IsSafeToDefineLR()
272 MI->getOperand(0).getReg() == ARM::LR && in IsSafeToDefineLR()
282 if (auto *LRDef = RDA->getReachingMIDef(Start, ARM::LR)) in IsSafeToDefineLR()
288 if (auto *LRDef = RDA->getLocalLiveOutMIDef(MBB, ARM::LR)) in IsSafeToDefineLR()
292 // We've found no suitable LR def and Start doesn't use LR directl in IsSafeToDefineLR()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/XCore/
H A DXCoreFrameLowering.cpp145 XCore::LR)); in GetSpillList()
260 // Allocate space on the stack at the same time as saving LR. in emitPrologue()
263 MBB.addLiveIn(XCore::LR); in emitPrologue()
266 MIB->addRegisterKilled(XCore::LR, MF.getSubtarget().getRegisterInfo(), in emitPrologue()
270 unsigned DRegNum = MRI->getDwarfRegNum(XCore::LR, true); in emitPrologue()
275 // If necessary, save LR and FP to the stack, as we EXTSP. in emitPrologue()
388 // If necessary, restore LR and FP from the stack, as we EXTSP. in emitEpilogue()
435 assert(Reg != XCore::LR && !(Reg == XCore::R10 && hasFP(*MF)) && in spillCalleeSavedRegisters()
436 "LR & FP are always handled in emitPrologue"); in spillCalleeSavedRegisters()
465 assert(Reg != XCore::LR in restoreCalleeSavedRegisters()
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/third_party/ffmpeg/libavutil/
H A Dtwofish.c30 #define LR(x, n) ((x) << (n) | (x) >> (32 - (n))) macro
220 t1 = MDS_mul(cs, LR(P[1], 8)); in twofish_encrypt()
222 P[3] = LR(P[3], 1) ^ (t0 + 2 * t1 + cs->K[2 * i + 9]); in twofish_encrypt()
224 t1 = MDS_mul(cs, LR(P[3], 8)); in twofish_encrypt()
226 P[1] = LR(P[1], 1) ^ (t0 + 2 * t1 + cs->K[2 * i + 11]); in twofish_encrypt()
248 t1 = MDS_mul(cs, LR(P[3], 8)); in twofish_decrypt()
249 P[0] = LR(P[0], 1) ^ (t0 + t1 + cs->K[2 * i + 8]); in twofish_decrypt()
252 t1 = MDS_mul(cs, LR(P[1], 8)); in twofish_decrypt()
253 P[2] = LR(P[2], 1) ^ (t0 + t1 + cs->K[2 * i + 6]); in twofish_decrypt()
305 B = LR( in av_twofish_init()
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/third_party/skia/third_party/externals/swiftshader/third_party/marl/src/
H A Dosfiber_asm_aarch64.h87 uintptr_t LR; // link register (R30) member
142 static_assert(offsetof(marl_fiber_context, LR) == MARL_REG_LR,

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