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Searched refs:LH (Results 1 - 25 of 30) sorted by relevance

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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/
H A DLegalizeTypesGeneric.cpp506 SDValue LL, LH, RL, RH, CL, CH; in SplitRes_SELECT() local
508 GetSplitOp(N->getOperand(1), LL, LH); in SplitRes_SELECT()
539 Hi = DAG.getNode(N->getOpcode(), dl, LH.getValueType(), CH, LH, RH); in SplitRes_SELECT()
544 SDValue LL, LH, RL, RH; in SplitRes_SELECT_CC() local
546 GetSplitOp(N->getOperand(2), LL, LH); in SplitRes_SELECT_CC()
551 Hi = DAG.getNode(ISD::SELECT_CC, dl, LH.getValueType(), N->getOperand(0), in SplitRes_SELECT_CC()
552 N->getOperand(1), LH, RH, N->getOperand(4)); in SplitRes_SELECT_CC()
H A DTargetLowering.cpp5738 SDValue LH, SDValue RL, SDValue RH) const {
5759 // LL, LH, RL, and RH must be either all NULL or all set to a value.
5760 assert((LL.getNode() && LH.getNode() && RL.getNode() && RH.getNode()) ||
5761 (!LL.getNode() && !LH.getNode() && !RL.getNode() && !RH.getNode()));
5827 if (!LH.getNode() && !RH.getNode() &&
5830 LH = DAG.getNode(ISD::SRL, dl, VT, LHS, Shift);
5831 LH = DAG.getNode(ISD::TRUNCATE, dl, HiLoVT, LH);
5836 if (!LH.getNode())
5846 LH
[all...]
H A DLegalizeIntegerTypes.cpp2910 SDValue LL, LH, RL, RH; in ExpandIntRes_Logical() local
2911 GetExpandedInteger(N->getOperand(0), LL, LH); in ExpandIntRes_Logical()
2914 Hi = DAG.getNode(N->getOpcode(), dl, LL.getValueType(), LH, RH); in ExpandIntRes_Logical()
2923 SDValue LL, LH, RL, RH; in ExpandIntRes_MUL() local
2924 GetExpandedInteger(N->getOperand(0), LL, LH); in ExpandIntRes_MUL()
2929 LL, LH, RL, RH)) in ExpandIntRes_MUL()
2987 DAG.getNode(ISD::MUL, dl, NVT, RL, LH))); in ExpandIntRes_MUL()
3070 SDValue LL, LH, RL, RH; in ExpandIntRes_MULFIX() local
3071 GetExpandedInteger(LHS, LL, LH); in ExpandIntRes_MULFIX()
3078 LL, LH, R in ExpandIntRes_MULFIX()
[all...]
H A DLegalizeVectorTypes.cpp1677 SDValue LL, LH, RL, RH; in SplitVecRes_SETCC() local
1680 GetSplitVector(N->getOperand(0), LL, LH); in SplitVecRes_SETCC()
1682 std::tie(LL, LH) = DAG.SplitVectorOperand(N, 0); in SplitVecRes_SETCC()
1691 Hi = DAG.getNode(N->getOpcode(), DL, HiVT, LH, RH, N->getOperand(2)); in SplitVecRes_SETCC()
/third_party/ffmpeg/libavcodec/mips/
H A Dh264chroma_msa.c861 out0 = LH(dst); in avc_chroma_hz_and_aver_dst_2x2_msa()
862 out1 = LH(dst + stride); in avc_chroma_hz_and_aver_dst_2x2_msa()
901 tp0 = LH(dst); in avc_chroma_hz_and_aver_dst_2x4_msa()
902 tp1 = LH(dst + stride); in avc_chroma_hz_and_aver_dst_2x4_msa()
903 tp2 = LH(dst + 2 * stride); in avc_chroma_hz_and_aver_dst_2x4_msa()
904 tp3 = LH(dst + 3 * stride); in avc_chroma_hz_and_aver_dst_2x4_msa()
1142 out0 = LH(dst); in avc_chroma_vt_and_aver_dst_2x2_msa()
1143 out1 = LH(dst + stride); in avc_chroma_vt_and_aver_dst_2x2_msa()
1181 tp0 = LH(dst); in avc_chroma_vt_and_aver_dst_2x4_msa()
1182 tp1 = LH(ds in avc_chroma_vt_and_aver_dst_2x4_msa()
[all...]
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/MCTargetDesc/
H A DMipsNaClELFStreamer.cpp222 case Mips::LH: in isBasePlusOffsetMemoryAccess()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/RISCV/
H A DRISCVMergeBaseOffset.cpp213 case RISCV::LH: in detectAndFoldOffset()
H A DRISCVISelDAGToDAG.cpp220 case RISCV::LH: in doPeepholeLoadStoreADDI()
H A DRISCVInstrInfo.cpp46 case RISCV::LH: in isLoadFromStackSlot()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/XCore/
H A DXCoreISelLowering.cpp676 SDValue LH, RH; in TryExpandADDWithMul() local
677 LH = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, MVT::i32, in TryExpandADDWithMul()
686 LH = DAG.getNode(ISD::MUL, dl, MVT::i32, LH, RL); in TryExpandADDWithMul()
688 Hi = DAG.getNode(ISD::ADD, dl, MVT::i32, Hi, LH); in TryExpandADDWithMul()
/third_party/node/deps/v8/src/codegen/mips64/
H A Dconstants-mips64.h458 LH = ((4U << 3) + 1) << kOpcodeShift,
1315 OpcodeToBitNumber(POP76) | OpcodeToBitNumber(LB) | OpcodeToBitNumber(LH) |
/third_party/node/deps/v8/src/codegen/mips/
H A Dconstants-mips.h469 LH = ((4U << 3) + 1) << kOpcodeShift,
1266 OpcodeToBitNumber(LB) | OpcodeToBitNumber(LH) | OpcodeToBitNumber(LWL) |
H A Dassembler-mips.cc2073 GenInstrImmediate(LH, source.rm(), rd, source.offset()); in lh()
/third_party/skia/third_party/externals/libwebp/src/dsp/
H A Dmsa_macro.h99 #define LH(psrc) MSA_LOAD(psrc, msa_lh) macro
118 #define LH(psrc) MSA_LOAD(psrc, msa_ulh) macro
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/
H A DTargetLowering.h4053 /// \param LH High bits of the LHS of the MUL. See LL for meaning.
4060 SDValue LL = SDValue(), SDValue LH = SDValue(),
4068 /// \param LH High bits of the LHS of the MUL. See LL for meaning.
4074 SDValue LL = SDValue(), SDValue LH = SDValue(),
/third_party/node/deps/v8/src/execution/s390/
H A Dsimulator-s390.h550 EVALUATE(LH);
H A Dsimulator-s390.cc879 EvalTable[LH] = &Simulator::Evaluate_LH; in EvalTableInit()
5331 EVALUATE(LH) { in EVALUATE()
5332 DCHECK_OPCODE(LH); in EVALUATE()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/
H A DMipsInstructionSelector.cpp207 return Opc == TargetOpcode::G_SEXTLOAD ? Mips::LH : Mips::LHu; in selectLoadStoreOpCode()
H A DMipsSEISelLowering.cpp3584 BuildMI(*BB, MI, DL, TII->get(UsingMips32 ? Mips::LH : Mips::LH64), Rt); in emitLD_F16_PSEUDO()
/third_party/ffmpeg/libavutil/mips/
H A Dgeneric_macros_msa.h48 #define LH(psrc) \ macro
89 #define LH(psrc) \ macro
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/RISCV/AsmParser/
H A DRISCVAsmParser.cpp1840 emitLoadStoreSymbol(Inst, RISCV::LH, IDLoc, Out, /*HasTmpReg=*/false); in processInstruction()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/SystemZ/
H A DSystemZInstrInfo.cpp196 // are low registers, otherwise use RISB[LH]G.
242 // are low registers, otherwise use RISB[LH]G. Size is the number of bits
1248 expandRXYPseudo(MI, SystemZ::LH, SystemZ::LHH); in expandPostRAPseudo()
H A DSystemZISelLowering.cpp3469 SDValue LH = DAG.getNode(ISD::SRA, DL, VT, LL, C63); in lowerSMUL_LOHI() local
3477 SDValue NegLHTimesRL = DAG.getNode(ISD::AND, DL, VT, LH, RL); in lowerSMUL_LOHI()
/third_party/node/deps/v8/src/codegen/s390/
H A Dconstants-s390.h1109 V(lh, LH, 0x48) /* type = RX_A LOAD HALFWORD (32<-16) */ \
/third_party/vixl/src/aarch64/
H A Dconstants-aarch64.h1350 N##LH = AtomicMemoryFixed | OP | 0x40400000, \

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