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Searched refs:IsStore (Results 1 - 24 of 24) sorted by relevance

/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/MCTargetDesc/
H A DMipsNaClELFStreamer.cpp158 bool IsStore = false; variable
160 &IsStore);
166 bool MaskAfter = IsSPFirstOperand && !IsStore;
211 bool *IsStore) { in isBasePlusOffsetMemoryAccess()
212 if (IsStore) in isBasePlusOffsetMemoryAccess()
213 *IsStore = false; in isBasePlusOffsetMemoryAccess()
243 if (IsStore) in isBasePlusOffsetMemoryAccess()
244 *IsStore = true; in isBasePlusOffsetMemoryAccess()
251 if (IsStore) in isBasePlusOffsetMemoryAccess()
252 *IsStore in isBasePlusOffsetMemoryAccess()
210 isBasePlusOffsetMemoryAccess(unsigned Opcode, unsigned *AddrIdx, bool *IsStore) isBasePlusOffsetMemoryAccess() argument
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H A DMipsMCNaCl.h21 bool *IsStore = nullptr);
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARC/
H A DARCOptAddrMode.cpp395 bool IsStore = Ldst->mayStore(); in canHoistLoadStoreTo() local
402 if (IsStore && MI->mayLoad()) in canHoistLoadStoreTo()
423 bool IsStore = Ldst->mayStore(); in canSinkLoadStoreTo() local
433 if (IsStore && MI->mayLoad()) in canSinkLoadStoreTo()
444 bool IsStore = Ldst.mayStore(); in changeToAddrMode() local
454 if (IsStore) { in changeToAddrMode()
461 if (IsStore) in changeToAddrMode()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/
H A DPPCVSXSwapRemoval.cpp75 unsigned int IsStore : 1; member
366 SwapVector[VecIdx].IsStore = 1; in gatherVectorInstructions()
372 SwapVector[VecIdx].IsStore = 1; in gatherVectorInstructions()
680 SwapVector[UseIdx].IsStore) { in recordUnoptimizableWebs()
696 } else if (SwapVector[EntryIdx].IsStore && SwapVector[EntryIdx].IsSwap) { in recordUnoptimizableWebs()
704 SwapVector[DefIdx].IsStore) { in recordUnoptimizableWebs()
770 } else if (SwapVector[EntryIdx].IsStore && SwapVector[EntryIdx].IsSwap) { in markSwapsForRemoval()
982 if (SwapVector[EntryIdx].IsStore) in dumpSwapVector()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
H A DSIRegisterInfo.cpp559 bool IsStore = MI->mayStore(); in spillVGPRtoAGPR()
563 unsigned Dst = IsStore ? Reg : ValueReg; in spillVGPRtoAGPR()
564 unsigned Src = IsStore ? ValueReg : Reg; in spillVGPRtoAGPR()
565 unsigned Opc = (IsStore ^ TRI->isVGPR(MRI, Reg)) ? AMDGPU::V_ACCVGPR_WRITE_B32 in spillVGPRtoAGPR()
582 bool IsStore = MI->mayStore(); in buildMUBUFOffsetLoadStore() local
585 int LoadStoreOp = IsStore ? in buildMUBUFOffsetLoadStore()
631 bool IsStore = Desc.mayStore(); in buildSpillLoadStore() local
692 unsigned SrcDstRegState = getDefRegState(!IsStore); in buildSpillLoadStore()
704 if (IsStore) in buildSpillLoadStore()
716 .addReg(SubReg, getDefRegState(!IsStore) | getKillRegStat in buildSpillLoadStore()
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H A DAMDGPULegalizerInfo.cpp705 const bool IsStore = Op == G_STORE;
818 if (IsStore)
/third_party/node/deps/v8/src/compiler/
H A Djs-heap-broker.cc369 bool KeyedAccessMode::IsStore() const { in IsStore() function in v8::internal::compiler::KeyedAccessMode
381 CHECK(IsStore()); in store_mode()
393 CHECK(!IsStore()); in KeyedAccessMode()
400 CHECK(IsStore()); in KeyedAccessMode()
H A Dprocessed-feedback.h103 bool IsStore() const;
H A Dmachine-operator-reducer.cc1261 DCHECK(nm.IsStore() || nm.IsUnalignedStore()); in ReduceStore()
1263 nm.IsStore() ? StoreRepresentationOf(node->op()).representation() in ReduceStore()
H A Djs-native-context-specialization.cc2733 (keyed_mode.IsStore() && in BuildElementAccess()
2924 if (keyed_mode.IsStore() && IsGrowStoreMode(keyed_mode.store_mode())) { in BuildElementAccess()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/
H A DThumb2SizeReduction.cpp466 bool IsStore = Entry.WideOpc == ARM::t2STR_POST; in ReduceLoadStore()
467 Register Rt = MI->getOperand(IsStore ? 1 : 0).getReg(); in ReduceLoadStore()
468 Register Rn = MI->getOperand(IsStore ? 0 : 1).getReg(); in ReduceLoadStore()
485 .addReg(Rt, IsStore ? 0 : RegState::Define); in ReduceLoadStore()
H A DARMLoadStoreOptimizer.cpp498 bool IsStore = in UpdateBaseRegUses() local
501 if (IsLoad || IsStore) { in UpdateBaseRegUses()
514 if (Offset >= 0 && !(IsStore && InstrSrcReg == Base)) in UpdateBaseRegUses()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/
H A DHexagonExpandCondsets.cpp822 bool IsLoad = TheI.mayLoad(), IsStore = TheI.mayStore(); in canMoveMemTo() local
823 if (!IsLoad && !IsStore) in canMoveMemTo()
845 bool Conflict = (L && IsStore) || S; in canMoveMemTo()
H A DHexagonConstExtenders.cpp1147 bool IsStore = MI.mayStore(); in recordExtender() local
1156 if (IsLoad || IsStore) { in recordExtender()
/third_party/node/deps/v8/src/codegen/arm64/
H A Dinstructions-arm64.h252 bool IsStore() const;
H A Dinstructions-arm64.cc44 bool Instruction::IsStore() const { in IsStore() function in v8::internal::Instruction
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/GlobalISel/
H A DCombinerHelper.cpp742 bool IsStore = Opcode == TargetOpcode::G_STORE; in applyCombineIndexedLoadStore() local
762 if (IsStore) { in applyCombineIndexedLoadStore()
/third_party/vixl/src/aarch64/
H A Dinstructions-aarch64.cc517 bool Instruction::IsStore() const { in IsStore() function in vixl::aarch64::Instruction
H A Dinstructions-aarch64.h489 bool IsStore() const;
H A Dsimulator-aarch64.cc4400 } else if (instr->IsStore()) { in Simulator()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/
H A DX86MCInstLower.cpp349 bool IsStore = Inst.getOperand(0).isReg() && Inst.getOperand(1).isReg(); in SimplifyShortMoveForm()
350 unsigned AddrBase = IsStore; in SimplifyShortMoveForm()
351 unsigned RegOp = IsStore ? 0 : 5; in SimplifyShortMoveForm()
H A DX86TargetTransformInfo.cpp2484 bool IsStore = (Instruction::Store == Opcode); in getMaskedMemoryOpCost() local
2495 (IsStore && !isLegalMaskedStore(SrcVTy, MaybeAlign(Alignment))) || in getMaskedMemoryOpCost()
2504 int ValueSplitCost = getScalarizationOverhead(SrcVTy, IsLoad, IsStore); in getMaskedMemoryOpCost()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.cpp11653 bool IsStore = false; in performNEONPostLDSTCombine() local
11668 NumVecs = 2; IsStore = true; break; in performNEONPostLDSTCombine()
11670 NumVecs = 3; IsStore = true; break; in performNEONPostLDSTCombine()
11672 NumVecs = 4; IsStore = true; break; in performNEONPostLDSTCombine()
11680 NumVecs = 2; IsStore = true; break; in performNEONPostLDSTCombine()
11682 NumVecs = 3; IsStore = true; break; in performNEONPostLDSTCombine()
11684 NumVecs = 4; IsStore = true; break; in performNEONPostLDSTCombine()
11698 NumVecs = 2; IsStore = true; IsLaneOp = true; break; in performNEONPostLDSTCombine()
11700 NumVecs = 3; IsStore = true; IsLaneOp = true; break; in performNEONPostLDSTCombine()
11702 NumVecs = 4; IsStore in performNEONPostLDSTCombine()
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/third_party/node/deps/v8/src/execution/arm64/
H A Dsimulator-arm64.cc2018 if (instr->IsStore()) {
2181 if (instr->IsStore()) {

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