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/third_party/cmsis/CMSIS/Core/Include/
H A Dcore_ca.h768 __IOM uint32_t ISPENDR[32]; /*!< \brief Offset: 0x200 (R/W) Interrupt Set-Pending Registers */ member
1573 /** \brief Get interrupt pending status from GIC's ISPENDR register.
1582 pend = (GICDistributor->ISPENDR[IRQn / 32U] >> (IRQn % 32U)) & 1UL; in GIC_GetPendingIRQ()
1597 /** \brief Sets the given interrupt as pending using GIC's ISPENDR register.
1603 GICDistributor->ISPENDR[IRQn / 32U] = 1U << (IRQn % 32U); in GIC_SetPendingIRQ()
1710 pending = ((GICDistributor->ISPENDR[IRQn / 32U]) >> (IRQn % 32U)) & 1UL; in GIC_GetIRQStatus()

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