| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| H A D | AArch64RegisterBankInfo.cpp | 65 // The GPR register bank is fully defined by all the registers in in AArch64RegisterBankInfo() 122 CHECK_VALUEMAP(GPR, 32); in AArch64RegisterBankInfo() 123 CHECK_VALUEMAP(GPR, 64); in AArch64RegisterBankInfo() 140 CHECK_VALUEMAP_3OPS(GPR, 32); in AArch64RegisterBankInfo() 141 CHECK_VALUEMAP_3OPS(GPR, 64); in AArch64RegisterBankInfo() 168 CHECK_VALUEMAP_CROSSREGCPY(GPR, GPR, 32); in AArch64RegisterBankInfo() 169 CHECK_VALUEMAP_CROSSREGCPY(GPR, FPR, 32); in AArch64RegisterBankInfo() 170 CHECK_VALUEMAP_CROSSREGCPY(GPR, GPR, 6 in AArch64RegisterBankInfo() [all...] |
| H A D | AArch64FrameLowering.cpp | 1910 enum RegType { GPR, FPR64, FPR128, PPR, ZPR } Type; enumerator 1920 case GPR: in getScale() 1968 RPI.Type = RegPairInfo::GPR; in computeCalleeSaveRegisterPairs() 1984 case RegPairInfo::GPR: in computeCalleeSaveRegisterPairs() 2147 case RegPairInfo::GPR: in spillCalleeSavedRegisters() 2253 case RegPairInfo::GPR: in restoreCalleeSavedRegisters() 2478 // Adding the size of additional 64bit GPR saves. in determineCalleeSaves()
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| /third_party/skia/third_party/externals/swiftshader/third_party/subzero/unittest/AssemblerX8664/ |
| H A D | XmmArith.cpp | 1485 #define TestImplSXmmReg(Dst, GPR, Inst, Size, IntType) \ in TEST_F() 1488 "(" #Dst ", " #GPR ", cvt" #Inst ", " #IntType ", f" #Size ")"; \ in TEST_F() 1492 __ mov(IceType_i32, Encoded_GPR_##GPR(), Immediate(Inst##Size##SrcValue)); \ in TEST_F() 1494 Encoded_GPR_##GPR()); \ in TEST_F() 1504 #define TestImplSRegXmm(GPR, Src, Inst, IntSize, Size) \ in TEST_F() 1507 "(" #GPR ", " #Src ", cvt" #Inst ", " #IntSize ", f" #Size ")"; \ in TEST_F() 1510 __ mov(IceType_i32, Encoded_GPR_##GPR(), Immediate(Inst##Size##DstValue)); \ in TEST_F() 1512 __ cvt##Inst(IceType_i##IntSize, Encoded_GPR_##GPR(), IceType_f##Size, \ in TEST_F() 1520 test.GPR()) \ in TEST_F() 1564 #define TestImplSRegAddr(GPR, Ins in TEST_F() [all...] |
| H A D | DataMov.cpp | 1358 #define TestMovmskGPRXmm(GPR, Src, Value1, Expected, Inst) \ in TEST_F() 1361 "(" #GPR ", " #Src ", " #Value1 ", " #Expected ", " #Inst ")"; \ in TEST_F() 1366 __ Inst(IceType_v4f32, Encoded_GPR_##GPR(), Encoded_Xmm_##Src()); \ in TEST_F() 1372 ASSERT_EQ(Expected, test.GPR()) << TestString; \ in TEST_F() 1376 #define TestMovmsk(GPR, Src) \ in TEST_F() 1378 TestMovmskGPRXmm(GPR, Src, (-1.0, 1.0, -1.0, 1.0), 0x05ul, movmsk); \ in TEST_F()
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| /third_party/skia/third_party/externals/swiftshader/third_party/subzero/unittest/AssemblerX8632/ |
| H A D | XmmArith.cpp | 1412 #define TestImplSXmmReg(Dst, GPR, Inst, Size) \ in TEST_F() 1415 "(" #Dst ", " #GPR ", cvt" #Inst ", f" #Size ")"; \ in TEST_F() 1419 __ mov(IceType_i32, GPRRegister::Encoded_Reg_##GPR, \ in TEST_F() 1422 GPRRegister::Encoded_Reg_##GPR); \ in TEST_F() 1432 #define TestImplSRegXmm(GPR, Src, Inst, Size) \ in TEST_F() 1435 "(" #GPR ", " #Src ", cvt" #Inst ", f" #Size ")"; \ in TEST_F() 1438 __ mov(IceType_i32, GPRRegister::Encoded_Reg_##GPR, \ in TEST_F() 1441 __ cvt##Inst(IceType_i32, GPRRegister::Encoded_Reg_##GPR, IceType_f##Size, \ in TEST_F() 1448 ASSERT_EQ(static_cast<uint32_t>(Inst##Size##Expected), test.GPR()) \ in TEST_F() 1493 #define TestImplSRegAddr(GPR, Ins in TEST_F() [all...] |
| H A D | DataMov.cpp | 970 #define TestMovmskGPRXmm(GPR, Src, Value1, Expected, Inst) \ in TEST_F() 973 "(" #GPR ", " #Src ", " #Value1 ", " #Expected ", " #Inst ")"; \ in TEST_F() 978 __ Inst(IceType_v4f32, GPRRegister::Encoded_Reg_##GPR, \ in TEST_F() 985 ASSERT_EQ(Expected, test.GPR()) << TestString; \ in TEST_F() 989 #define TestMovmsk(GPR, Src) \ in TEST_F() 991 TestMovmskGPRXmm(GPR, Src, (-1.0, 1.0, -1.0, 1.0), 0x05ul, movmsk); \ in TEST_F()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/SystemZ/ |
| H A D | SystemZMachineFunctionInfo.h | 17 // A struct to hold the low and high GPR registers to be saved/restored as 46 // Get and set the first and last call-saved GPR that should be saved by 56 // Get and set the first and last call-saved GPR that should be restored by 69 void setVarArgsFirstGPR(unsigned GPR) { VarArgsFirstGPR = GPR; } in setVarArgsFirstGPR() argument
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/ |
| H A D | HexagonGenPredicate.cpp | 427 RegisterSubReg GPR = MI->getOperand(i); in convertToPredForm() local 428 RegisterSubReg Pred = getPredRegFor(GPR); in convertToPredForm()
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| /third_party/ffmpeg/tests/checkasm/arm/ |
| H A D | checkasm.S | 145 @ keep track of the checked GPR
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| /third_party/alsa-lib/include/sound/uapi/ |
| H A D | emu10k1.h | 100 #define GPR(x) (FXGPREGBASE + (x)) /* free GPRs: x = 0x00 - 0xff */ macro 275 unsigned int gpr_controls; /* count of GPR controls */ 301 unsigned int count; /* count of GPR (1..16) */ 302 unsigned short gpr[32]; /* GPR number(s) */ 328 unsigned int gpr_add_control_count; /* count of GPR controls to add/replace */ 329 struct snd_emu10k1_fx8010_control_gpr *gpr_add_controls; /* GPR controls to add/replace */ 331 unsigned int gpr_del_control_count; /* count of GPR controls to remove */ 332 struct emu10k1_ctl_elem_id *gpr_del_controls; /* IDs of GPR controls to remove */ 334 unsigned int gpr_list_control_count; /* count of GPR controls to list */ 335 unsigned int gpr_list_control_total; /* total count of GPR control [all...] |
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 3555 // SPE passes doubles in GPR pairs. in LowerFormalArguments_32SVR4() 3763 static const MCPhysReg GPR[] = { in LowerFormalArguments_64SVR4() local 3772 const unsigned Num_GPR_Regs = array_lengthof(GPR); in LowerFormalArguments_64SVR4() 3835 /* Compute GPR index associated with argument offset. */ in LowerFormalArguments_64SVR4() 3891 unsigned VReg = MF.addLiveIn(GPR[GPR_idx++], &PPC::G8RCRegClass); in LowerFormalArguments_64SVR4() 3926 unsigned VReg = MF.addLiveIn(GPR[GPR_idx], &PPC::G8RCRegClass); in LowerFormalArguments_64SVR4() 3963 unsigned VReg = MF.addLiveIn(GPR[GPR_idx++], &PPC::G8RCRegClass); in LowerFormalArguments_64SVR4() 4009 unsigned VReg = MF.addLiveIn(GPR[GPR_idx++], &PPC::G8RCRegClass); in LowerFormalArguments_64SVR4() 4136 unsigned VReg = MF.addLiveIn(GPR[GPR_idx], &PPC::G8RCRegClass); in LowerFormalArguments_64SVR4() 4193 const MCPhysReg *GPR in LowerFormalArguments_Darwin() local 4601 static const MCPhysReg GPR[] = { needStackSlotPassParameters() local 5861 static const MCPhysReg GPR[] = { LowerCall_64SVR4() local 6605 const MCPhysReg *GPR = isPPC64 ? GPR_64 : GPR_32; LowerCall_Darwin() local [all...] |
| /third_party/ffmpeg/libavutil/x86/ |
| H A D | tx_float.asm | 96 ; %3 - GPR of LUT (int32_t indices) address 98 ; %5 - temporary GPR (only used if vgather is not used)
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| /third_party/node/deps/openssl/openssl/crypto/bn/asm/ |
| H A D | ia64-mont.pl | 673 // replaced with merged move of np[8] to GPR bank
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| /third_party/openssl/crypto/bn/asm/ |
| H A D | ia64-mont.pl | 673 // replaced with merged move of np[8] to GPR bank
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/AsmParser/ |
| H A D | ARMAsmParser.cpp | 4240 // For register list parsing, we need to map from raw GPR register numbering 4244 // If this is a GPR, we need to do it manually, otherwise we can rely in getNextRegister() 4250 default: llvm_unreachable("Invalid GPR number!"); in getNextRegister() 6751 const MCRegisterClass &GPR = MRI->getRegClass(ARM::GPRRegClassID); in fixupGNULDRDAlias() local 6752 if (!GPR.contains(Op2.getReg())) in fixupGNULDRDAlias() 6763 unsigned PairedReg = GPR.getRegister(RtEncoding + 1); in fixupGNULDRDAlias() 7114 // ldrexd/strexd require even/odd GPR pair. To enforce this constraint, in ParseInstruction() 7173 // return 'true' if register list contains non-low GPR registers, 11219 return Error(L, ".save expects GPR registers"); in parseDirectiveRegSave()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 3319 // in their paired GPR. So we only need to save the GPR to their home in get64BitArgumentXMMs() 3551 unsigned GPR = MF.addLiveIn(Reg, &X86::GR64RegClass); 3553 DAG.getCopyFromReg(Chain, dl, GPR, MVT::i64)); 8552 // That's better than general shuffling and may eliminate a load to GPR and 11371 // Otherwise load an immediate into a GPR, cast to k-register, and use a 18645 /// round-trip between XMM and GPR. [all...] |