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Searched refs:FCSR_ (Results 1 - 8 of 8) sorted by relevance

/third_party/node/deps/v8/src/execution/riscv64/
H A Dsimulator-riscv64.cc2210 FCSR_ = 0; in Simulator()
2383 return (FCSR_ & kFcsrFlagsMask); in read_csr_value()
2385 return (FCSR_ & kFcsrFrmMask) >> kFcsrFrmShift; in read_csr_value()
2387 return (FCSR_ & kFcsrMask); in read_csr_value()
2402 FCSR_ = (FCSR_ & (~kFcsrFlagsMask)) | value; in write_csr_value()
2406 FCSR_ = (FCSR_ & (~kFcsrFrmMask)) | (value << kFcsrFrmShift); in write_csr_value()
2410 FCSR_ = (FCSR_ in write_csr_value()
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H A Dsimulator-riscv64.h945 uint32_t FCSR_; member in v8::internal::Simulator
/third_party/node/deps/v8/src/execution/mips64/
H A Dsimulator-mips64.cc821 FCSR_ = kFCSRNaN2008FlagMask; in Simulator()
824 FCSR_ = 0; in Simulator()
1029 FCSR_ |= (1 << cc); in set_fcsr_bit()
1031 FCSR_ &= ~(1 << cc); in set_fcsr_bit()
1035 bool Simulator::test_fcsr_bit(uint32_t cc) { return FCSR_ & (1 << cc); } in test_fcsr_bit()
1038 FCSR_ &= ~kFCSRCauseMask; in clear_fcsr_cause()
1042 FCSR_ |= mode & kFPURoundingModeMask; in set_fcsr_rounding_mode()
1050 return FCSR_ & kFPURoundingModeMask; in get_fcsr_rounding_mode()
1175 if (FCSR_ & kFCSRNaN2008FlagMask) { in set_fpu_register_word_invalid_result()
1193 if (FCSR_ in set_fpu_register_invalid_result()
3625 SetResult(rt_reg(), FCSR_); DecodeTypeRegisterCOP1() local
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H A Dsimulator-mips64.h611 uint32_t FCSR_; member in v8::internal::Simulator
/third_party/node/deps/v8/src/execution/mips/
H A Dsimulator-mips.cc877 FCSR_ = kFCSRNaN2008FlagMask; in Simulator()
881 FCSR_ = 0; in Simulator()
1100 FCSR_ |= (1 << cc); in set_fcsr_bit()
1102 FCSR_ &= ~(1 << cc); in set_fcsr_bit()
1106 bool Simulator::test_fcsr_bit(uint32_t cc) { return FCSR_ & (1 << cc); } in test_fcsr_bit()
1109 FCSR_ &= ~kFCSRCauseMask; in clear_fcsr_cause()
1113 FCSR_ |= mode & kFPURoundingModeMask; in set_fcsr_rounding_mode()
1121 return FCSR_ & kFPURoundingModeMask; in get_fcsr_rounding_mode()
1130 if (FCSR_ & kFCSRNaN2008FlagMask) { in set_fpu_register_word_invalid_result()
1148 if (FCSR_ in set_fpu_register_invalid_result()
3677 SetResult(rt_reg(), FCSR_); DecodeTypeRegisterCOP1() local
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H A Dsimulator-mips.h590 uint32_t FCSR_; member in v8::internal::Simulator
/third_party/node/deps/v8/src/execution/loong64/
H A Dsimulator-loong64.cc853 FCSR_ = 0; in Simulator()
1020 FCSR_ |= (1 << cc); in set_fcsr_bit()
1022 FCSR_ &= ~(1 << cc); in set_fcsr_bit()
1026 bool Simulator::test_fcsr_bit(uint32_t cc) { return FCSR_ & (1 << cc); } in test_fcsr_bit()
1029 FCSR_ |= mode & kFPURoundingModeMask; in set_fcsr_rounding_mode()
1033 return FCSR_ & kFPURoundingModeMask; in get_fcsr_rounding_mode()
1289 // switch ((FCSR_ >> 8) & 3) { in round_according_to_fcsr()
1290 switch (FCSR_ & kFPURoundingModeMask) { in round_according_to_fcsr()
1331 switch (FCSR_ & kFPURoundingModeMask) { in round64_according_to_fcsr()
1372 switch (FCSR_ in round_according_to_fcsr()
4675 SetResult(rd_reg(), FCSR_); DecodeTypeOp22() local
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H A Dsimulator-loong64.h517 uint32_t FCSR_; member in v8::internal::Simulator

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