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Searched refs:DR (Results 1 - 25 of 25) sorted by relevance

/third_party/mesa3d/src/panfrost/bifrost/valhall/test/
H A Dtest-mark-last.cpp32 #define DR(x) bi_discard(R(x)) macro
62 CASE(bi_fadd_f32_to(b, R(0), DR(0), DR(1))); in TEST()
65 bi_fadd_f32_to(b, R(2), R(0), DR(1)); in TEST()
66 bi_fadd_f32_to(b, R(0), DR(0), DR(2)); in TEST()
72 bi_fadd_f32_to(b, R(0), DR(0), DR(0)); in TEST()
73 bi_fadd_f32_to(b, R(0), DR(0), DR( in TEST()
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/third_party/skia/third_party/externals/spirv-tools/test/link/
H A Dtype_match_test.cpp37 #define PartVector(DR, DA, N, T) DR(N) " = OpTypeVector " DA(T) " 3"
38 #define PartMatrix(DR, DA, N, T) DR(N) " = OpTypeMatrix " DA(T) " 4"
39 #define PartImage(DR, DA, N, T) \
40 DR(N) " = OpTypeImage " DA(T) " 2D 0 0 0 0 Rgba32f"
41 #define PartSampledImage(DR, DA, N, T) DR(N) " = OpTypeSampledImage " DA(T)
42 #define PartArray(DR, DA, N, T) DR(
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/third_party/skia/third_party/externals/swiftshader/third_party/SPIRV-Tools/test/link/
H A Dtype_match_test.cpp37 #define PartVector(DR, DA, N, T) DR(N) " = OpTypeVector " DA(T) " 3"
38 #define PartMatrix(DR, DA, N, T) DR(N) " = OpTypeMatrix " DA(T) " 4"
39 #define PartImage(DR, DA, N, T) \
40 DR(N) " = OpTypeImage " DA(T) " 2D 0 0 0 0 Rgba32f"
41 #define PartSampledImage(DR, DA, N, T) DR(N) " = OpTypeSampledImage " DA(T)
42 #define PartArray(DR, DA, N, T) DR(
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/third_party/spirv-tools/test/link/
H A Dtype_match_test.cpp37 #define PartVector(DR, DA, N, T) DR(N) " = OpTypeVector " DA(T) " 3"
38 #define PartMatrix(DR, DA, N, T) DR(N) " = OpTypeMatrix " DA(T) " 4"
39 #define PartImage(DR, DA, N, T) \
40 DR(N) " = OpTypeImage " DA(T) " 2D 0 0 0 0 Rgba32f"
41 #define PartSampledImage(DR, DA, N, T) DR(N) " = OpTypeSampledImage " DA(T)
42 #define PartArray(DR, DA, N, T) DR(
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/third_party/pcre2/pcre2/src/sljit/
H A DsljitNativeMIPS_common.c125 #define DR(dr) (reg_map[dr]) macro
853 FAIL_IF(push_inst(compiler, ADDIU_W | S(SLJIT_SP) | T(SLJIT_SP) | IMM(-local_size), DR(SLJIT_SP))); in sljit_emit_enter()
858 FAIL_IF(push_inst(compiler, ADDU_W | S(SLJIT_SP) | TA(0) | D(TMP_REG2), DR(TMP_REG2))); in sljit_emit_enter()
859 FAIL_IF(push_inst(compiler, SUBU_W | S(SLJIT_SP) | TA(OTHER_FLAG) | D(SLJIT_SP), DR(SLJIT_SP))); in sljit_emit_enter()
952 FAIL_IF(push_inst(compiler, ADDU_W | SA(4 + arg_count) | TA(0) | D(tmp), DR(tmp))); in sljit_emit_enter()
954 FAIL_IF(push_inst(compiler, LW | base | T(tmp) | IMM(local_size + (arg_count << 2)), DR(tmp))); in sljit_emit_enter()
991 FAIL_IF(push_inst(compiler, ADDU_W | SA(3 + arg_count) | TA(0) | D(tmp), DR(tmp))); in sljit_emit_enter()
1053 FAIL_IF(push_inst(compiler, ADDIU_W | S(SLJIT_SP) | T(SLJIT_SP) | IMM(local_size - frame_size), DR(SLJIT_SP))); in emit_stack_frame_release()
1060 FAIL_IF(load_immediate(compiler, DR(TMP_REG1), local_size - tmp)); in emit_stack_frame_release()
1061 FAIL_IF(push_inst(compiler, ADDU_W | S(SLJIT_SP) | T(TMP_REG1) | D(SLJIT_SP), DR(SLJIT_S in emit_stack_frame_release()
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H A DsljitNativeMIPS_64.c123 FAIL_IF(push_inst(compiler, LUI | T(dst) | IMM(init_value >> 48), DR(dst))); in emit_const()
124 FAIL_IF(push_inst(compiler, ORI | S(dst) | T(dst) | IMM(init_value >> 32), DR(dst))); in emit_const()
125 FAIL_IF(push_inst(compiler, DSLL | T(dst) | D(dst) | SH_IMM(16), DR(dst))); in emit_const()
126 FAIL_IF(push_inst(compiler, ORI | S(dst) | T(dst) | IMM(init_value >> 16), DR(dst))); in emit_const()
127 FAIL_IF(push_inst(compiler, DSLL | T(dst) | D(dst) | SH_IMM(16), DR(dst))); in emit_const()
128 return push_inst(compiler, ORI | S(dst) | T(dst) | IMM(init_value), DR(dst)); in emit_const()
244 SLJIT_ASSERT(DR(PIC_ADDR_REG) == 25 && PIC_ADDR_REG == TMP_REG2); in sljit_emit_call()
278 FAIL_IF(emit_op_mem(compiler, WORD_DATA | LOAD_DATA, DR(PIC_ADDR_REG), src, srcw)); in sljit_emit_icall()
286 FAIL_IF(push_inst(compiler, DADDU | S(src) | TA(0) | D(PIC_ADDR_REG), DR(PIC_ADDR_REG))); in sljit_emit_icall()
301 SLJIT_ASSERT(DR(PIC_ADDR_RE in sljit_emit_icall()
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H A DsljitNativeMIPS_32.c43 FAIL_IF(push_inst(compiler, LUI | T(dst) | IMM(init_value >> 16), DR(dst))); in emit_const()
44 return push_inst(compiler, ORI | S(dst) | T(dst) | IMM(init_value), DR(dst)); in emit_const()
127 FAIL_IF(push_inst(compiler, ADDIU | S(SLJIT_SP) | T(SLJIT_SP) | IMM(-16), DR(SLJIT_SP))); in call_with_args()
215 SLJIT_ASSERT(DR(PIC_ADDR_REG) == 25 && PIC_ADDR_REG == TMP_REG2); in sljit_emit_call()
247 (type & SLJIT_CALL_RETURN) ? UNMOVABLE_INS : DR(SLJIT_SP))); in sljit_emit_call()
263 FAIL_IF(emit_op_mem(compiler, WORD_DATA | LOAD_DATA, DR(PIC_ADDR_REG), src, srcw)); in sljit_emit_icall()
271 FAIL_IF(push_inst(compiler, ADDU | S(src) | TA(0) | D(PIC_ADDR_REG), DR(PIC_ADDR_REG))); in sljit_emit_icall()
286 SLJIT_ASSERT(DR(PIC_ADDR_REG) == 25 && PIC_ADDR_REG == TMP_REG2); in sljit_emit_icall()
289 FAIL_IF(load_immediate(compiler, DR(PIC_ADDR_REG), srcw)); in sljit_emit_icall()
291 FAIL_IF(push_inst(compiler, ADDU | S(src) | TA(0) | D(PIC_ADDR_REG), DR(PIC_ADDR_RE in sljit_emit_icall()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/
H A DRDFCopy.cpp145 RegisterRef DR = DA.Addr->getRegRef(DFG); in run() local
146 auto FR = EM.find(DR); in run()
150 if (DR == SR) in run()
161 if (UA.Addr->getRegRef(DFG) != DR) in run()
174 dbgs() << "Can replace " << Print<RegisterRef>(DR, DFG) in run()
202 if (J.second != DR) in run()
H A DHexagonGenMux.cpp112 MuxInfo(MachineBasicBlock::iterator It, unsigned DR, unsigned PR, in MuxInfo()
115 : At(It), DefR(DR), PredR(PR), SrcT(TOp), SrcF(FOp), Def1(&D1), in MuxInfo()
242 Register DR = MI->getOperand(0).getReg(); in genMuxInBlock() local
243 if (isRegPair(DR)) in genMuxInBlock()
251 CondsetMap::iterator F = CM.find(DR); in genMuxInBlock()
261 auto It = CM.insert(std::make_pair(DR, CondsetInfo())); in genMuxInBlock()
274 // There is now a complete definition of DR, i.e. we have the predicate in genMuxInBlock()
311 if (DU.Defs[PR] || DU.Defs[DR] || DU.Uses[DR]) { in genMuxInBlock()
328 ML.push_back(MuxInfo(At, DR, P in genMuxInBlock()
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H A DHexagonGenPredicate.cpp473 RegisterSubReg DR = MI.getOperand(0); in eliminatePredCopies() local
475 if (!Register::isVirtualRegister(DR.R)) in eliminatePredCopies()
479 if (MRI->getRegClass(DR.R) != PredRC) in eliminatePredCopies()
483 assert(!DR.S && !SR.S && "Unexpected subregister"); in eliminatePredCopies()
484 MRI->replaceRegWith(DR.R, SR.R); in eliminatePredCopies()
H A DHexagonSplitDouble.cpp426 for (unsigned DR : Part) { in isProfitable()
427 MachineInstr *DefI = MRI->getVRegDef(DR); in isProfitable()
433 if (isInduction(DR, IRM)) in isProfitable()
436 for (auto U = MRI->use_nodbg_begin(DR), W = MRI->use_nodbg_end(); in isProfitable()
818 // Shift left: DR = shl R, #s in splitShift()
822 // Shift right: DR = shr R, #s in splitShift()
933 // DR = or (R1, asl(R2, #s)) in splitAslOr()
941 // DR = or (R1, asl(R2, #0)) in splitAslOr()
970 // DR = or (R1, asl(R2, #32)) in splitAslOr()
980 // DR in splitAslOr()
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H A DHexagonExpandCondsets.cpp376 Register DR = Op.getReg(), DSR = Op.getSubReg(); in updateDeadsInRange()
377 if (!Register::isVirtualRegister(DR) || DR != Reg) in updateDeadsInRange()
379 LaneBitmask SLM = getLaneMask(DR, DSR); in updateDeadsInRange()
675 Register DR = MD.getReg(), DSR = MD.getSubReg(); in split() local
709 genCondTfrFor(ST, At, DR, DSR, MP, true, ReadUndef, false); in split()
711 genCondTfrFor(SF, At, DR, DSR, MP, false, ReadUndef, true); in split()
H A DRDFLiveness.cpp406 RegisterRef DR = DA.Addr->getRegRef(DFG); in getAllReachedUses() local
409 if (DefRRs.hasCoverOf(DR) || !PRI.alias(RefRR, DR)) in getAllReachedUses()
417 NewDefRRs.insert(DR); in getAllReachedUses()
H A DHexagonBitSimplify.cpp980 Register DR = UseI->getOperand(0).getReg();
981 if (DR == R)
1470 unsigned DR = Defs.find_first();
1471 if (!Register::isVirtualRegister(DR))
1474 const BitTracker::RegisterCell &DRC = BT.lookup(DR);
1479 unsigned ImmReg = genTfrConst(MRI.getRegClass(DR), C, B, At, DL);
1481 HBS::replaceReg(DR, ImmReg, MRI);
3082 unsigned DR = getDefReg(SI);
3083 const TargetRegisterClass *RC = MRI->getRegClass(DR);
3099 RegMap.insert(std::make_pair(DR, NewD
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H A DHexagonOptAddrMode.cpp249 RegisterRef DR = DFG->getPRI().normalize(DA.Addr->getRegRef(*DFG)); in getAllRealUses() local
251 auto UseSet = LV->getAllReachedUses(DR, DA); in getAllRealUses()
269 if (!DFG->getPRI().alias(RegisterRef(I.first), DR)) in getAllRealUses()
H A DHexagonEarlyIfConv.cpp841 Register DR = PN->getOperand(0).getReg(); in updatePhiNodes() local
842 const TargetRegisterClass *RC = MRI->getRegClass(DR); in updatePhiNodes()
H A DRDFGraph.cpp1268 auto isDefUndef = [this] (const MachineInstr &In, RegisterRef DR) -> bool { in buildStmt()
1269 // This instruction defines DR. Check if there is a use operand that in buildStmt()
1270 // would make DR live on entry to the instruction. in buildStmt()
1275 if (PRI.alias(DR, UR)) in buildStmt()
H A DHexagonFrameLowering.cpp2042 for (auto &DR : F->second) in findPhysReg()
2043 if (DR.contains(FIR)) in findPhysReg()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/SystemZ/
H A DSystemZISelDAGToDAG.cpp54 DispRange DR; member
65 : Form(form), DR(dr), Base(), Disp(0), Index(), in SystemZAddressingMode()
163 // Try to match Addr as a FormBD address with displacement type DR.
166 bool selectBDAddr(SystemZAddressingMode::DispRange DR, SDValue Addr,
169 // Try to match Addr as a FormBDX address with displacement type DR.
172 bool selectMVIAddr(SystemZAddressingMode::DispRange DR, SDValue Addr,
176 // displacement type DR. Return true on success, storing the base,
179 SystemZAddressingMode::DispRange DR, SDValue Addr,
384 // with range DR. Here we're interested in the range of both the instruction
385 // described by DR an
386 selectDisp(SystemZAddressingMode::DispRange DR, int64_t Val) selectDisp() argument
497 isValidDisp(SystemZAddressingMode::DispRange DR, int64_t Val) isValidDisp() argument
663 selectBDAddr(SystemZAddressingMode::DispRange DR, SDValue Addr, SDValue &Base, SDValue &Disp) const selectBDAddr() argument
674 selectMVIAddr(SystemZAddressingMode::DispRange DR, SDValue Addr, SDValue &Base, SDValue &Disp) const selectMVIAddr() argument
685 selectBDXAddr(SystemZAddressingMode::AddrForm Form, SystemZAddressingMode::DispRange DR, SDValue Addr, SDValue &Base, SDValue &Disp, SDValue &Index) const selectBDXAddr() argument
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/ADT/
H A Diterator.h354 const DataRef DR; member in llvm::WrappedPairNodeDataIterator
358 WrappedPairNodeDataIterator(ItType Begin, const DataRef DR) in WrappedPairNodeDataIterator() argument
359 : BaseT(Begin), DR(DR) { in WrappedPairNodeDataIterator()
360 NR.first = DR; in WrappedPairNodeDataIterator()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/AsmPrinter/
H A DCodeViewDebug.cpp1132 LocalVarDefRange DR; in createDefRangeMem() local
1133 DR.InMemory = -1; in createDefRangeMem()
1134 DR.DataOffset = Offset; in createDefRangeMem()
1135 assert(DR.DataOffset == Offset && "truncation"); in createDefRangeMem()
1136 DR.IsSubfield = 0; in createDefRangeMem()
1137 DR.StructOffset = 0; in createDefRangeMem()
1138 DR.CVRegister = CVRegister; in createDefRangeMem()
1139 return DR; in createDefRangeMem()
1253 LocalVarDefRange DR; in calculateRanges() local
1254 DR in calculateRanges()
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/third_party/skia/third_party/externals/harfbuzz/src/
H A Dhb-ot-shape-complex-arabic-table.hh21 #define DR JOINING_GROUP_DALATH_RISH macro
48 /* 0700 */ X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,T,A,X,D,D,D,DR,DR,R,R,R,D,D,D,D,R,D,
49 /* 0720 */ D,D,D,D,D,D,D,D,R,D,DR,D,R,D,D,DR,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,
219 #undef DR macro
/third_party/node/deps/v8/src/execution/s390/
H A Dsimulator-s390.h536 EVALUATE(DR);
H A Dsimulator-s390.cc865 EvalTable[DR] = &Simulator::Evaluate_DR; in EvalTableInit()
5178 EVALUATE(DR) { in EVALUATE()
5179 DCHECK_OPCODE(DR); in EVALUATE()
/third_party/node/deps/v8/src/codegen/s390/
H A Dconstants-s390.h1496 V(dr, DR, 0x1D) /* type = RR DIVIDE (32<-64) */ \

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