Searched refs:COMBINE (Results 1 - 7 of 7) sorted by relevance
| /third_party/mesa3d/src/gallium/drivers/nouveau/nv50/ |
| H A D | nv50_tex.c | 455 #define COMBINE(x, y) x, y macro
459 COMBINE(0, 0),
469 COMBINE(0, 0),
470 COMBINE(1, 0),
479 COMBINE(0, 0),
480 COMBINE(1, 0),
481 COMBINE(0, 1),
482 COMBINE(1, 1),
489 COMBINE(0, 0),
490 COMBINE(
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| /third_party/icu/icu4c/source/common/ |
| H A D | ushape.cpp | 60 #define COMBINE (SHADDA+CSHADDA) macro
1522 if (aggregate_tashkeel && ((prevLink|currLink)&COMBINE) == COMBINE && aggregation_possible) { in u_shapeArabic()
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| /third_party/node/deps/icu-small/source/common/ |
| H A D | ushape.cpp | 60 #define COMBINE (SHADDA+CSHADDA) macro
1522 if (aggregate_tashkeel && ((prevLink|currLink)&COMBINE) == COMBINE && aggregation_possible) { in u_shapeArabic()
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| /third_party/skia/third_party/externals/icu/source/common/ |
| H A D | ushape.cpp | 60 #define COMBINE (SHADDA+CSHADDA) macro
1522 if (aggregate_tashkeel && ((prevLink|currLink)&COMBINE) == COMBINE && aggregation_possible) { in u_shapeArabic()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/ |
| H A D | HexagonISelLowering.cpp | 1696 case HexagonISD::COMBINE: return "HexagonISD::COMBINE"; in getTargetNodeName()
2044 SDValue Concat10 = DAG.getNode(HexagonISD::COMBINE, dl, in LowerVECTOR_SHUFFLE()
2051 SDValue Concat01 = DAG.getNode(HexagonISD::COMBINE, dl, in LowerVECTOR_SHUFFLE()
2322 return DAG.getNode(HexagonISD::COMBINE, dl, VecTy, {H, L}); in buildVector64()
2439 ValR = DAG.getNode(HexagonISD::COMBINE, dl, MVT::i64, in insertVector()
2587 return DAG.getNode(HexagonISD::COMBINE, dl, VecTy, Op.getOperand(1), in LowerCONCAT_VECTORS()
2611 W = DAG.getNode(HexagonISD::COMBINE, dl, MVT::i64, in LowerCONCAT_VECTORS()
2637 SDValue WW = DAG.getNode(HexagonISD::COMBINE, dl, MVT::i64, in LowerCONCAT_VECTORS()
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| H A D | HexagonISelLowering.h | 54 COMBINE,
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| H A D | HexagonISelLoweringHVX.cpp | 808 SDValue WW = DAG.getNode(HexagonISD::COMBINE, dl, MVT::i64, {W1, W0}); in extractHvxSubvectorReg()
871 SDValue Vec64 = DAG.getNode(HexagonISD::COMBINE, dl, MVT::v8i8, {W1, W0}); in extractHvxSubvectorPred()
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