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Searched refs:Aligned (Results 1 - 25 of 29) sorted by relevance

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/third_party/skia/bench/
H A DGrMemoryPoolBench.cpp18 struct alignas(GrMemoryPool::kAlignment) Aligned {
21 static_assert(sizeof(Aligned) == 32);
22 static_assert(sizeof(Aligned) % GrMemoryPool::kAlignment == 0);
33 static_assert(SkAlignTo(sizeof(Unaligned), GrMemoryPool::kAlignment) == sizeof(Aligned));
193 DEF_BENCH( return new GrMemoryPoolBench("stack_aligned_lg", run_stack<Aligned>, kLargePool); )
194 DEF_BENCH( return new GrMemoryPoolBench("stack_aligned_sm", run_stack<Aligned>, kSmallPool); )
195 DEF_BENCH( return new GrMemoryPoolBench("stack_aligned_ref", run_stack<Aligned>, 0); )
200 DEF_BENCH( return new GrMemoryPoolBench("queue_aligned_lg", run_queue<Aligned>, kLargePool); )
201 DEF_BENCH( return new GrMemoryPoolBench("queue_aligned_sm", run_queue<Aligned>, kSmallPool); )
202 DEF_BENCH( return new GrMemoryPoolBench("queue_aligned_ref", run_queue<Aligned>,
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/third_party/spirv-tools/test/fuzz/
H A Dtransformation_set_memory_operands_mask_test.cpp79 OpCopyMemory %12 %21 Aligned 16 in TEST()
86 %147 = OpLoad %7 %146 Volatile|Nontemporal|Aligned 16 in TEST()
125 // Not OK to remove Aligned in TEST()
136 (uint32_t)spv::MemoryAccessMask::Aligned | in TEST()
145 // Not OK to remove Aligned in TEST()
154 (uint32_t)spv::MemoryAccessMask::Aligned, 0) in TEST() member in spvtools::fuzz::__anon26871::spv::MemoryAccessMask
161 (uint32_t)spv::MemoryAccessMask::Aligned | in TEST()
177 // Not OK to add Aligned in TEST()
180 (uint32_t)spv::MemoryAccessMask::Aligned | in TEST()
287 OpCopyMemory %12 %21 Aligned|Nontempora in TEST()
476 (uint32_t)spv::MemoryAccessMask::Aligned, TEST() member in spvtools::fuzz::__anon26871::spv::MemoryAccessMask
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/third_party/spirv-tools/test/
H A Dcpp_interface_test.cpp326 EXPECT_EQ(spv::MemoryAccessMask(6), spv::MemoryAccessMask::Aligned | in TEST()
331 EXPECT_EQ(spv::MemoryAccessMask::Aligned, in TEST()
332 spv::MemoryAccessMask::Aligned & spv::MemoryAccessMask(6)); in TEST()
336 spv::MemoryAccessMask::Aligned); in TEST() member in spvtools::__anon26735::spv::MemoryAccessMask
341 spv::MemoryAccessMask::Aligned ^ spv::MemoryAccessMask(6)); in TEST()
342 EXPECT_EQ(spv::MemoryAccessMask::Aligned, in TEST()
345 spv::MemoryAccessMask::Aligned); in TEST() member in spvtools::__anon26735::spv::MemoryAccessMask
H A Doperand_pattern_test.cpp109 // Aligned has one literal number operand.
111 uint32_t(spv::MemoryAccessMask::Aligned),
114 // Volatile with Aligned still has just one literal number operand.
117 spv::MemoryAccessMask::Aligned),
H A Dtext_to_binary.memory_test.cpp55 {spv::MemoryAccessMask::Aligned, "Aligned", {16}},
60 const std::string input = "OpStore %ptr %value Volatile|Aligned 16"; in TEST_F()
62 spv::MemoryAccessMask::Aligned); in TEST_F()
200 std::string spirv = "OpCopyMemory %1 %2 Aligned 8\n"; in TEST_F()
247 "Volatile|Aligned|Nontemporal|MakePointerAvailable|" in TEST_F()
279 "Aligned|MakePointerAvailable|NonPrivatePointer 16 %4\n"; in TEST_F()
331 std::string spirv = "OpCopyMemorySized %1 %2 %3 Aligned 8\n"; in TEST_F()
379 "Volatile|Aligned|Nontemporal|MakePointerAvailable|" in TEST_F()
412 "Aligned|MakePointerAvailabl in TEST_F()
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H A Dtext_to_binary.extension_test.cpp600 {"OpStore %1 %2 Aligned|MakePointerAvailable 4 %3\n", in TEST_F()
605 int(spv::MemoryAccessMask::Aligned), in TEST_F()
626 {"%2 = OpLoad %1 %3 Aligned|MakePointerVisible 8 %4\n", in TEST_F()
631 int(spv::MemoryAccessMask::Aligned), in TEST_F()
/third_party/skia/third_party/externals/abseil-cpp/absl/container/internal/
H A Dlayout.h93 // `Aligned<T, N>`. `Layout<..., Aligned<T, N>, ...>` has exactly the same API
197 // array. `Layout<..., Aligned<T, N>, ...>` has exactly the same API
204 struct Aligned;
212 struct NotAligned<const Aligned<T, N>> {
213 static_assert(sizeof(T) == 0, "Aligned<T, N> cannot be const-qualified");
228 struct Type<Aligned<T, N>> {
236 struct SizeOf<Aligned<T, N>> : std::integral_constant<size_t, sizeof(T)> {};
245 struct AlignOf<Aligned<T, N>> {
H A Dlayout_test.cc1344 constexpr Layout<unsigned char, Aligned<unsigned char, 8>> x(1, 2); in TEST()
1352 constexpr Layout<unsigned char, Aligned<unsigned char, 2 * M>> x(1, 3); in TEST()
1362 static_assert(Layout<Aligned<int8_t, 64>>::Alignment() == 64, ""); in TEST()
1373 constexpr Layout<unsigned char, Aligned<unsigned char, 2 * M>> x(1, 3); in TEST()
/third_party/spirv-tools/source/fuzz/
H A Dtransformation_set_memory_operands_mask.cpp198 for (auto mask_bit : {spv::MemoryAccessMask::Aligned, in GetInOperandIndexForMask()
/third_party/skia/third_party/externals/spirv-headers/include/spirv/1.0/
H A Dspirv.cs532 Aligned = 1, enumerator
540 Aligned = 0x00000002, enumerator
/third_party/skia/third_party/externals/spirv-headers/include/spirv/1.1/
H A Dspirv.cs541 Aligned = 1, enumerator
549 Aligned = 0x00000002, enumerator
/third_party/skia/third_party/externals/spirv-headers/include/spirv/1.2/
H A Dspirv.cs546 Aligned = 1, enumerator
554 Aligned = 0x00000002, enumerator
/third_party/skia/third_party/externals/swiftshader/third_party/SPIRV-Headers/include/spirv/1.0/
H A Dspirv.cs532 Aligned = 1, enumerator
540 Aligned = 0x00000002, enumerator
/third_party/skia/third_party/externals/swiftshader/third_party/SPIRV-Headers/include/spirv/1.1/
H A Dspirv.cs541 Aligned = 1, enumerator
549 Aligned = 0x00000002, enumerator
/third_party/skia/third_party/externals/swiftshader/third_party/SPIRV-Headers/include/spirv/1.2/
H A Dspirv.cs546 Aligned = 1, enumerator
554 Aligned = 0x00000002, enumerator
/third_party/spirv-headers/include/spirv/1.0/
H A Dspirv.cs532 Aligned = 1, enumerator
540 Aligned = 0x00000002, enumerator
/third_party/spirv-headers/include/spirv/1.1/
H A Dspirv.cs541 Aligned = 1, enumerator
549 Aligned = 0x00000002, enumerator
/third_party/spirv-headers/include/spirv/1.2/
H A Dspirv.cs546 Aligned = 1, enumerator
554 Aligned = 0x00000002, enumerator
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/
H A DX86FastISel.cpp92 MachineMemOperand *MMO = nullptr, bool Aligned = false);
95 MachineMemOperand *MMO = nullptr, bool Aligned = false);
485 MachineMemOperand *MMO, bool Aligned) { in X86FastEmitStore()
541 if (Aligned) { in X86FastEmitStore()
553 if (Aligned) { in X86FastEmitStore()
568 if (Aligned) { in X86FastEmitStore()
581 if (Aligned) { in X86FastEmitStore()
591 if (Aligned) { in X86FastEmitStore()
604 if (Aligned) { in X86FastEmitStore()
614 if (Aligned) in X86FastEmitStore()
483 X86FastEmitStore(EVT VT, unsigned ValReg, bool ValIsKill, X86AddressMode &AM, MachineMemOperand *MMO, bool Aligned) X86FastEmitStore() argument
657 X86FastEmitStore(EVT VT, const Value *Val, X86AddressMode &AM, MachineMemOperand *MMO, bool Aligned) X86FastEmitStore() argument
1135 bool Aligned = Alignment >= ABIAlignment; X86SelectStore() local
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/third_party/skia/third_party/externals/oboe/samples/RhythmGame/third_party/glm/detail/
H A D_swizzle.hpp23 template <int N, typename T, precision P, template <typename, precision> class vecType, int E0, int E1, int E2, int E3, bool Aligned>
28 template <typename T, precision P, template <typename, precision> class vecType, int E0, int E1, bool Aligned>
29 struct _swizzle_base1<2, T, P, vecType, E0,E1,-1,-2, Aligned> : public _swizzle_base0<T, 2>
34 template <typename T, precision P, template <typename, precision> class vecType, int E0, int E1, int E2, bool Aligned>
35 struct _swizzle_base1<3, T, P, vecType, E0,E1,E2,-1, Aligned> : public _swizzle_base0<T, 3>
40 template <typename T, precision P, template <typename, precision> class vecType, int E0, int E1, int E2, int E3, bool Aligned>
41 struct _swizzle_base1<4, T, P, vecType, E0,E1,E2,E3, Aligned> : public _swizzle_base0<T, 4>
/third_party/skia/third_party/externals/spirv-headers/include/spirv/unified1/
H A Dspirv.cs791 Aligned = 1, enumerator
805 Aligned = 0x00000002, enumerator
/third_party/skia/third_party/externals/swiftshader/third_party/SPIRV-Headers/include/spirv/unified1/
H A Dspirv.cs792 Aligned = 1, enumerator
806 Aligned = 0x00000002, enumerator
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/
H A DHexagonISelLowering.cpp2791 SDValue Aligned = DAG.getNode(HexagonISD::VALIGN, dl, LoadTy, in LowerUnalignedLoad() local
2795 SDValue M = DAG.getMergeValues({Aligned, NewChain}, dl); in LowerUnalignedLoad()
3239 auto Aligned = [](unsigned GivenA, unsigned MinA) -> bool { in getOptimalMemOpType() local
3243 if (Size >= 8 && Aligned(DstAlign, 8) && (IsMemset || Aligned(SrcAlign, 8))) in getOptimalMemOpType()
3245 if (Size >= 4 && Aligned(DstAlign, 4) && (IsMemset || Aligned(SrcAlign, 4))) in getOptimalMemOpType()
3247 if (Size >= 2 && Aligned(DstAlign, 2) && (IsMemset || Aligned(SrcAlign, 2))) in getOptimalMemOpType()
/third_party/spirv-headers/include/spirv/unified1/
H A Dspirv.cs892 Aligned = 1, enumerator
908 Aligned = 0x00000002, enumerator
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/IR/
H A DAutoUpgrade.cpp1236 bool Aligned) { in UpgradeMaskedStore()
1241 Aligned ? cast<VectorType>(Data->getType())->getBitWidth() / 8 : 1; in UpgradeMaskedStore()
1256 bool Aligned) { in UpgradeMaskedLoad()
1261 Aligned ? cast<VectorType>(Passthru->getType())->getBitWidth() / 8 : 1; in UpgradeMaskedLoad()
1786 bool Aligned = Name[17] != 'u'; // "avx512.mask.storeu". in UpgradeIntrinsicCall() local
1788 CI->getArgOperand(2), Aligned); in UpgradeIntrinsicCall()
2140 /*Aligned*/false); in UpgradeIntrinsicCall()
2144 /*Aligned*/true); in UpgradeIntrinsicCall()
1234 UpgradeMaskedStore(IRBuilder< &Builder, Value *Ptr, Value *Data, Value *Mask, bool Aligned) UpgradeMaskedStore() argument
1254 UpgradeMaskedLoad(IRBuilder< &Builder, Value *Ptr, Value *Passthru, Value *Mask, bool Aligned) UpgradeMaskedLoad() argument

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