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/third_party/icu/ohos_icu4j/src/main/tests/ohos/global/icu/dev/test/bidi/
H A DTestData.java39 protected static final int AL = UCharacterDirection.RIGHT_TO_LEFT_ARABIC; field in TestData
53 "LRE", "LRO", "AL", "RLE", "RLO", "PDF", "NSM", "BN",
58 { R, AL, WS, R, AL, WS, R }, // 1
60 { L, AL, AL, AL, L, AL, AL, L, WS, EN, CS, WS, EN, CS, EN, WS, L, L }, // 3
61 { AL,
[all...]
H A DTestClassOverride.java31 private static final int AL = TestData.AL; field in TestClassOverride
54 L, AL, AL, AL, AL, AL, AL, R, //40-47
/third_party/icu/icu4j/main/tests/core/src/com/ibm/icu/dev/test/bidi/
H A DTestData.java36 protected static final int AL = UCharacterDirection.RIGHT_TO_LEFT_ARABIC; field in TestData
50 "LRE", "LRO", "AL", "RLE", "RLO", "PDF", "NSM", "BN",
55 { R, AL, WS, R, AL, WS, R }, // 1
57 { L, AL, AL, AL, L, AL, AL, L, WS, EN, CS, WS, EN, CS, EN, WS, L, L }, // 3
58 { AL,
[all...]
H A DTestClassOverride.java28 private static final int AL = TestData.AL; field in TestClassOverride
51 L, AL, AL, AL, AL, AL, AL, R, //40-47
/third_party/skia/third_party/externals/swiftshader/third_party/subzero/src/DartARM32/
H A Dassembler_arm.h437 void and_(Register rd, Register rn, Operand o, Condition cond = AL);
440 void eor(Register rd, Register rn, Operand o, Condition cond = AL);
443 void sub(Register rd, Register rn, Operand o, Condition cond = AL);
444 void subs(Register rd, Register rn, Operand o, Condition cond = AL);
447 void rsb(Register rd, Register rn, Operand o, Condition cond = AL);
448 void rsbs(Register rd, Register rn, Operand o, Condition cond = AL);
451 void add(Register rd, Register rn, Operand o, Condition cond = AL);
453 void adds(Register rd, Register rn, Operand o, Condition cond = AL);
456 void adc(Register rd, Register rn, Operand o, Condition cond = AL);
458 void adcs(Register rd, Register rn, Operand o, Condition cond = AL);
947 LoadFieldFromOffset(OperandSize type, Register reg, Register base, int32_t offset, Condition cond = AL) LoadFieldFromOffset() argument
1024 SmiTag(Register reg, Condition cond = AL) SmiTag() argument
1028 SmiTag(Register dst, Register src, Condition cond = AL) SmiTag() argument
1032 SmiUntag(Register reg, Condition cond = AL) SmiUntag() argument
1036 SmiUntag(Register dst, Register src, Condition cond = AL) SmiUntag() argument
[all...]
/third_party/icu/icu4c/source/test/cintltst/
H A Dcbididat.c26 "LRE", "LRO", "AL", "RLE", "RLO", "PDF", "NSM", "BN",
34 /* LRE LRO AL RLE RLO PDF NSM BN */
57 R, AL, WS, R, AL, WS, R
87 L, AL, AL, AL, L, AL, AL, L, WS, EN, CS, WS, EN, CS, EN, WS, L, L
102 AL,
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/third_party/skia/third_party/externals/swiftshader/third_party/subzero/src/
H A DIceTargetLoweringARM32.h241 case CondARM32::AL: in invert()
244 return CondWhenTrue(CondARM32::AL); in invert()
271 /// the flags if Cond is not AL, and must not emit any instructions that could
277 CondARM32::Cond Cond = CondARM32::AL);
327 CondARM32::Cond Pred = CondARM32::AL) { in _add()
331 CondARM32::Cond Pred = CondARM32::AL) { in _adds()
339 CondARM32::Cond Pred = CondARM32::AL) { in _adc()
343 CondARM32::Cond Pred = CondARM32::AL) { in _and()
347 CondARM32::Cond Pred = CondARM32::AL) { in _asr()
351 CondARM32::Cond Pred = CondARM32::AL) { in _bic()
[all...]
H A DIceInstARM32.cpp518 assert(Predicate != CondARM32::AL); in optimizeBranch()
675 Asm->vadds(Dest, getSrc(0), getSrc(1), CondARM32::AL); in emitIAS()
678 Asm->vaddd(Dest, getSrc(0), getSrc(1), CondARM32::AL); in emitIAS()
818 Asm->vdivs(getDest(), getSrc(0), getSrc(1), CondARM32::AL); in emitIAS() member in Ice::ARM32::CondARM32
821 Asm->vdivd(getDest(), getSrc(0), getSrc(1), CondARM32::AL); in emitIAS() member in Ice::ARM32::CondARM32
851 Asm->vmlas(getDest(), getSrc(1), getSrc(2), CondARM32::AL); in emitIAS() member in Ice::ARM32::CondARM32
855 Asm->vmlad(getDest(), getSrc(1), getSrc(2), CondARM32::AL); in emitIAS() member in Ice::ARM32::CondARM32
872 Asm->vmlss(getDest(), getSrc(1), getSrc(2), CondARM32::AL); in emitIAS() member in Ice::ARM32::CondARM32
876 Asm->vmlsd(getDest(), getSrc(1), getSrc(2), CondARM32::AL); in emitIAS() member in Ice::ARM32::CondARM32
1102 Asm->vsubs(getDest(), getSrc(0), getSrc(1), CondARM32::AL); in emitIAS() member in Ice::ARM32::CondARM32
1105 Asm->vsubd(getDest(), getSrc(0), getSrc(1), CondARM32::AL); emitIAS() member in Ice::ARM32::CondARM32
[all...]
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/
H A DARMAsmPrinter.cpp177 .addImm(ARMCC::AL) in runOnMachineFunction()
1006 .addImm(ARMCC::AL)
1315 .addImm(ARMCC::AL)
1352 .addImm(ARMCC::AL).addReg(0)
1361 .addImm(ARMCC::AL)
1370 .addImm(ARMCC::AL)
1381 .addImm(ARMCC::AL)
1394 .addImm(ARMCC::AL)
1422 TmpInst.addOperand(MCOperand::createImm(ARMCC::AL));
1454 TmpInst.addOperand(MCOperand::createImm(ARMCC::AL));
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H A DARMFrameLowering.cpp170 ARMCC::CondCodes Pred = ARMCC::AL, unsigned PredReg = 0) { in emitRegPlusImmediate()
183 ARMCC::CondCodes Pred = ARMCC::AL, in emitSPUpdate()
306 .add(predOps(ARMCC::AL)); in emitAligningInstructions()
311 .add(predOps(ARMCC::AL)) in emitAligningInstructions()
321 .add(predOps(ARMCC::AL)) in emitAligningInstructions()
326 .add(predOps(ARMCC::AL)) in emitAligningInstructions()
336 .add(predOps(ARMCC::AL)); in emitAligningInstructions()
525 .add(predOps(ARMCC::AL)); in emitPrologue()
538 .add(predOps(ARMCC::AL)) in emitPrologue()
549 .add(predOps(ARMCC::AL)) in emitPrologue()
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H A DARMInstructionSelector.cpp259 MIB.add(predOps(ARMCC::AL)); in selectMergeValues()
291 MIB.add(predOps(ARMCC::AL)); in selectUnmergeValues()
392 // needed, the second member of the pair is ARMCC::AL.
395 std::pair<ARMCC::CondCodes, ARMCC::CondCodes> Preds = {ARMCC::AL, ARMCC::AL}; in getComparePreds()
456 assert(Preds.first != ARMCC::AL && "No comparisons needed?"); in getComparePreds()
499 .add(predOps(ARMCC::AL)) in putConstant()
555 if (ARMConds.second == ARMCC::AL) { in selectCmp()
585 .add(predOps(ARMCC::AL)); in insertComparison()
593 .add(predOps(ARMCC::AL)); in insertComparison()
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H A DThumb1FrameLowering.cpp87 MRI.emitLoadConstPool(MBB, MBBI, dl, ScratchReg, 0, NumBytes, ARMCC::AL, in emitPrologueEpilogueSPUpdate()
92 .add(predOps(ARMCC::AL)); in emitPrologueEpilogueSPUpdate()
306 .add(predOps(ARMCC::AL)); in emitPrologue()
414 .add(predOps(ARMCC::AL)); in emitPrologue()
420 .add(predOps(ARMCC::AL)); in emitPrologue()
426 .add(predOps(ARMCC::AL)); in emitPrologue()
430 .add(predOps(ARMCC::AL)); in emitPrologue()
442 .add(predOps(ARMCC::AL)); in emitPrologue()
521 .add(predOps(ARMCC::AL)); in emitEpilogue()
525 .add(predOps(ARMCC::AL)); in emitEpilogue()
[all...]
H A DThumb1InstrInfo.cpp30 NopInst.addOperand(MCOperand::createImm(ARMCC::AL)); in getNoop()
53 .add(predOps(ARMCC::AL)); in copyPhysReg()
69 .add(predOps(ARMCC::AL)) in copyPhysReg()
72 .add(predOps(ARMCC::AL)) in copyPhysReg()
101 .add(predOps(ARMCC::AL)); in storeRegToStackSlot()
129 .add(predOps(ARMCC::AL)); in loadRegFromStackSlot()
H A DThumb2InstrInfo.cpp48 NopInst.addOperand(MCOperand::createImm(ARMCC::AL)); in getNoop()
72 if (CC != ARMCC::AL) in ReplaceTailWithBranchTo()
80 if (CC != ARMCC::AL) { in ReplaceTailWithBranchTo()
118 return getITInstrPredicate(*MBBI, PredReg) == ARMCC::AL; in isLegalToSplitMBBAt()
131 .add(predOps(ARMCC::AL)); in copyPhysReg()
154 .add(predOps(ARMCC::AL)); in storeRegToStackSlot()
170 MIB.addFrameIndex(FI).addImm(0).addMemOperand(MMO).add(predOps(ARMCC::AL)); in storeRegToStackSlot()
195 .add(predOps(ARMCC::AL)); in loadRegFromStackSlot()
211 MIB.addFrameIndex(FI).addImm(0).addMemOperand(MMO).add(predOps(ARMCC::AL)); in loadRegFromStackSlot()
301 .add(predOps(ARMCC::AL)); in emitT2RegPlusImmediate()
[all...]
H A DARMInstrInfo.cpp39 NopInst.addOperand(MCOperand::createImm(ARMCC::AL)); in getNoop()
45 NopInst.addOperand(MCOperand::createImm(ARMCC::AL)); in getNoop()
135 .add(predOps(ARMCC::AL)); in expandLoadStackGuard()
H A DARMBaseInstrInfo.cpp452 BuildMI(&MBB, DL, get(BOpc)).addMBB(TBB).add(predOps(ARMCC::AL)); in insertBranch()
469 BuildMI(&MBB, DL, get(BOpc)).addMBB(FBB).add(predOps(ARMCC::AL)); in insertBranch()
488 if (PIdx != -1 && I->getOperand(PIdx).getImm() != ARMCC::AL) in isPredicated()
495 return PIdx != -1 && MI.getOperand(PIdx).getImm() != ARMCC::AL; in isPredicated()
532 case ARMCC::AL: in SubsumesPredicate()
784 MIB.add(predOps(ARMCC::AL)) in copyFromCPSR()
804 .add(predOps(ARMCC::AL)) in copyToCPSR()
840 .add(predOps(ARMCC::AL)) in copyPhysReg()
868 MIB.add(predOps(ARMCC::AL)); in copyPhysReg()
933 .add(predOps(ARMCC::AL)); in copyPhysReg()
[all...]
H A DThumbRegisterInfo.cpp97 .add(predOps(ARMCC::AL)) in emitThumb2LoadConstPool()
166 MRI.emitLoadConstPool(MBB, MBBI, dl, LdReg, 0, NumBytes, ARMCC::AL, 0, in emitThumbRegPlusImmInReg()
179 MIB.add(predOps(ARMCC::AL)); in emitThumbRegPlusImmInReg()
319 MIB.setMIFlags(MIFlags).add(predOps(ARMCC::AL)); in emitThumbRegPlusImmediate()
334 .add(predOps(ARMCC::AL)) in emitThumbRegPlusImmediate()
563 MIB.add(predOps(ARMCC::AL));
H A DARMExpandPseudoInsts.cpp959 MIB.add(predOps(ARMCC::AL)); in ExpandCMP_SWAP()
972 MIB.add(predOps(ARMCC::AL)); in ExpandCMP_SWAP()
978 .add(predOps(ARMCC::AL)); in ExpandCMP_SWAP()
996 MIB.add(predOps(ARMCC::AL)); in ExpandCMP_SWAP()
1002 .add(predOps(ARMCC::AL)); in ExpandCMP_SWAP()
1087 MIB.addReg(AddrReg).add(predOps(ARMCC::AL)); in ExpandCMP_SWAP_64()
1093 .add(predOps(ARMCC::AL)); in ExpandCMP_SWAP_64()
1116 MIB.addReg(AddrReg).add(predOps(ARMCC::AL)); in ExpandCMP_SWAP_64()
1122 .add(predOps(ARMCC::AL)); in ExpandCMP_SWAP_64()
1194 MIB.add(predOps(ARMCC::AL)); in ExpandMI()
[all...]
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/ADT/
H A DAllocatorList.h59 AllocatorList &AL; member
61 Cloner(AllocatorList &AL) : AL(AL) {} in Cloner()
63 Node *operator()(const Node &N) const { return AL.create(N.V); } in operator ()()
67 AllocatorList &AL; member
69 Disposer(AllocatorList &AL) : AL(AL) {} in Disposer()
73 AL in operator ()()
[all...]
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Transforms/Instrumentation/
H A DDataFlowSanitizer.cpp736 AttributeList AL; in runOnModule() local
737 AL = AL.addAttribute(M.getContext(), AttributeList::FunctionIndex, in runOnModule()
739 AL = AL.addAttribute(M.getContext(), AttributeList::FunctionIndex, in runOnModule()
741 AL = AL.addAttribute(M.getContext(), AttributeList::ReturnIndex, in runOnModule()
743 AL = AL.addParamAttribute(M.getContext(), 0, Attribute::ZExt); in runOnModule()
744 AL in runOnModule()
750 AttributeList AL; runOnModule() local
763 AttributeList AL; runOnModule() local
776 AttributeList AL; runOnModule() local
[all...]
H A DGCOVProfiling.cpp896 AttributeList AL;
898 AL = AL.addParamAttribute(*Ctx, 2, AK);
899 FunctionCallee Res = M->getOrInsertFunction("llvm_gcda_start_file", FTy, AL);
912 AttributeList AL;
914 AL = AL.addParamAttribute(*Ctx, 0, AK);
915 AL = AL.addParamAttribute(*Ctx, 2, AK);
916 AL
[all...]
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/Utils/
H A DARMBaseInfo.h45 AL // Always (unconditional) Always (unconditional) enumerator
73 default: return ARMCC::AL; in getSwappedCondition()
162 case ARMCC::AL: return "al"; in ARMCondCodeToString()
185 .Case("al", ARMCC::AL) in ARMCondCodeFromString()
/third_party/node/deps/ada/
H A Dada.cpp8201 AL,
8271 {0x606, 0x607, direction::ON}, {0x608, 0x608, direction::AL},
8272 {0x609, 0x60a, direction::ET}, {0x60b, 0x60b, direction::AL},
8273 {0x60c, 0x60c, direction::CS}, {0x60d, 0x60d, direction::AL},
8275 {0x61b, 0x61c, direction::AL}, {0x61e, 0x64a, direction::AL},
8278 {0x66d, 0x66f, direction::AL}, {0x670, 0x670, direction::NSM},
8279 {0x671, 0x6d5, direction::AL}, {0x6d6, 0x6dc, direction::NSM},
8281 {0x6df, 0x6e4, direction::NSM}, {0x6e5, 0x6e6, direction::AL},
8283 {0x6ea, 0x6ed, direction::NSM}, {0x6ee, 0x6ef, direction::AL},
[all...]
/third_party/icu/icu4c/source/common/
H A Dubidiimp.h58 AL= U_RIGHT_TO_LEFT_ARABIC, /* 13 */ enumerator
86 #define MASK_RTL (DIRPROP_FLAG(R)|DIRPROP_FLAG(AL)|DIRPROP_FLAG(RLE)|DIRPROP_FLAG(RLO)|DIRPROP_FLAG(RLI))
87 #define MASK_R_AL (DIRPROP_FLAG(R)|DIRPROP_FLAG(AL))
88 #define MASK_STRONG_EN_AN (DIRPROP_FLAG(L)|DIRPROP_FLAG(R)|DIRPROP_FLAG(AL)|DIRPROP_FLAG(EN)|DIRPROP_FLAG(AN))
164 uint16_t flags; /* bits for L or R/AL found within the pair */
341 /* lastArabicPos is index to the last AL in the text, -1 if none */
/third_party/node/deps/icu-small/source/common/
H A Dubidiimp.h58 AL= U_RIGHT_TO_LEFT_ARABIC, /* 13 */ enumerator
86 #define MASK_RTL (DIRPROP_FLAG(R)|DIRPROP_FLAG(AL)|DIRPROP_FLAG(RLE)|DIRPROP_FLAG(RLO)|DIRPROP_FLAG(RLI))
87 #define MASK_R_AL (DIRPROP_FLAG(R)|DIRPROP_FLAG(AL))
88 #define MASK_STRONG_EN_AN (DIRPROP_FLAG(L)|DIRPROP_FLAG(R)|DIRPROP_FLAG(AL)|DIRPROP_FLAG(EN)|DIRPROP_FLAG(AN))
164 uint16_t flags; /* bits for L or R/AL found within the pair */
341 /* lastArabicPos is index to the last AL in the text, -1 if none */

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