/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
H A D | AArch64MacroFusion.cpp | 160 if ((FirstMI == nullptr || FirstMI->getOpcode() == AArch64::ADRP) && in isLiteralsPair() 221 case AArch64::ADRP: in isAddressLdStPair()
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H A D | AArch64CollectLOH.cpp | 39 // respectively ADRP, ADD (immediate), and LD. 45 // - The ADRP in L1 and the ADD in L2 must reference the same symbol using 49 // * So called non-ADRP-related: 79 // * So called ADRP-related: 81 // L2: ADRP xA, sym1@PAGE 82 // L1: ADRP xA, sym2@PAGE 84 // This LOH aims at getting rid of redundant ADRP instructions. 122 "Number of simplifiable ADRP dominate by another"); 127 STATISTIC(NumADRPToLDR, "Number of simplifiable LDR reachable by ADRP"); 128 STATISTIC(NumADRSimpleCandidate, "Number of simplifiable ADRP [all...] |
H A D | AArch64AsmPrinter.cpp | 502 MCInstBuilder(AArch64::ADRP) in EmitHwasanMemaccessSymbols() 1127 Adrp.setOpcode(AArch64::ADRP); in EmitInstruction()
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H A D | AArch64ExpandPseudoInsts.cpp | 501 // Small codemodel expand into ADRP + LDR. in expandMI() 505 BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(AArch64::ADRP), DstReg); in expandMI() 554 // Expand into ADRP + ADD. in expandMI() 557 BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(AArch64::ADRP), DstReg) in expandMI()
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H A D | AArch64ISelLowering.h | 36 ADRP, // Page address of a TargetGlobalAddress operand.
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H A D | AArch64FastISel.cpp | 443 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(AArch64::ADRP), in materializeFP() 474 // ADRP + LDRX in materializeGV() 475 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(AArch64::ADRP), in materializeGV() 506 // ADRP + ADDX in materializeGV() 507 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(AArch64::ADRP), in materializeGV() 3290 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(AArch64::ADRP), in fastLowerCall()
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H A D | AArch64InstrInfo.cpp | 1491 BuildMI(MBB, FirstEpilogSEH, DL, TII->get(AArch64::ADRP)) in expandPostRAPseudo() 1551 BuildMI(MBB, MI, DL, get(AArch64::ADRP), Reg) in expandPostRAPseudo() 6119 if (MI.getOpcode() == AArch64::ADRP) in getOutliningType()
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H A D | AArch64ISelLowering.cpp | 1236 case AArch64ISD::ADRP: return "AArch64ISD::ADRP"; in getTargetNodeName() 4535 SDValue ADRP = DAG.getNode(AArch64ISD::ADRP, DL, Ty, Hi); in getAddr() local 4536 return DAG.getNode(AArch64ISD::ADDlow, DL, Ty, ADRP, Lo); in getAddr() 4753 /// have a descriptor, accessible via a PC-relative ADRP, and whose first entry 4897 SDValue ADRP = DAG.getNode(AArch64ISD::ADRP, DL, PtrVT, TLSIndexHi); in LowerWindowsGlobalTLSAddress() local 4899 DAG.getNode(AArch64ISD::ADDlow, DL, PtrVT, ADRP, TLSIndexLo); in LowerWindowsGlobalTLSAddress()
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H A D | AArch64InstructionSelector.cpp | 2455 // We generate a MOVaddrJT which will get expanded to an ADRP + ADD later. in selectJumpTable() 3177 MIRBuilder.buildInstr(AArch64::ADRP, {&AArch64::GPR64RegClass}, {}) in emitLoadFromConstantPool()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/Disassembler/ |
H A D | AArch64ExternalSymbolizer.cpp | 55 /// tested and for ADRP an other instructions that help to load of pointers 92 } else if (MI.getOpcode() == AArch64::ADRP) { in tryAddingSymbolicOperand() 94 // otool expects the fully encoded ADRP instruction to be passed in as in tryAddingSymbolicOperand()
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/third_party/vixl/src/aarch64/ |
H A D | instructions-aarch64.cc | 903 // ADR and ADRP. in GetImmPCOffsetTarget() 905 if (Mask(PCRelAddressingMask) == ADRP) { in GetImmPCOffsetTarget() 952 VIXL_ASSERT(Mask(PCRelAddressingMask) == ADRP); in SetPCRelImmTarget()
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H A D | constants-aarch64.h | 582 // case ADRP: Format("adrp 'Xd, 'AddrPCRelPage"); break; 655 ADRP = PCRelAddressingFixed | 0x80000000 enumerator
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H A D | disasm-aarch64.cc | 1259 case ADRP: in Disassembler()
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H A D | assembler-aarch64.cc | 460 Emit(ADRP | ImmPCRelAddress(imm21) | Rd(xd)); in adrp()
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H A D | simulator-aarch64.cc | 3714 (instr->Mask(PCRelAddressingMask) == ADRP)); in Simulator()
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/third_party/node/deps/v8/src/codegen/arm64/ |
H A D | constants-arm64.h | 461 // case ADRP: Format("adrp 'Xd, 'AddrPCRelPage"); break; 525 ADRP = PCRelAddressingFixed | 0x80000000
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/third_party/node/deps/v8/src/execution/arm64/ |
H A D | simulator-arm64.cc | 1690 case ADRP: // Not implemented in the assembler.
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