Searched refs:ADD_S (Results 1 - 10 of 10) sorted by relevance
| /third_party/node/deps/v8/src/compiler/backend/riscv64/ |
| H A D | instruction-scheduler-riscv64.cc | 448 ADD_S = 4, enumerator
1295 return Latency::ADD_S; in GetInstructionLatency()
1379 2 * Latency::CVT_S_L + Latency::ADD_S; in GetInstructionLatency()
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| /third_party/node/deps/v8/src/compiler/backend/mips64/ |
| H A D | instruction-scheduler-mips64.cc | 447 ADD_S = 4, enumerator
1494 return Latency::ADD_S; in GetInstructionLatency()
1575 2 * Latency::CVT_S_L + Latency::ADD_S; in GetInstructionLatency()
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| /third_party/node/deps/v8/src/compiler/backend/mips/ |
| H A D | instruction-scheduler-mips.cc | 420 ADD_S = 4, enumerator
1762 return Latency::ADD_S; in GetInstructionLatency()
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| /third_party/mesa3d/src/freedreno/ir3/ |
| H A D | ir3.h | 1585 PAIR(ADD_U, ADD_S) in ir3_try_swap_signedness()
2254 INSTR2(ADD_S)
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| /third_party/node/deps/v8/src/codegen/mips64/ |
| H A D | constants-mips64.h | 656 ADD_S = ((0U << 3) + 0),
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| /third_party/node/deps/v8/src/codegen/mips/ |
| H A D | constants-mips.h | 610 ADD_S = ((0U << 3) + 0),
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| H A D | assembler-mips.cc | 2533 GenInstrRegister(COP1, S, ft, fs, fd, ADD_S); in add_s()
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| /third_party/pcre2/pcre2/src/sljit/ |
| H A D | sljitNativeMIPS_common.c | 139 #define ADD_S (HI(17) | FMT_S | LO(0)) macro
2787 FAIL_IF(push_inst(compiler, ADD_S | FMT(op) | FT(src2) | FS(src1) | FD(dst_r), MOVABLE_INS)); in sljit_emit_fop2()
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| /third_party/node/deps/v8/src/execution/mips64/ |
| H A D | simulator-mips64.cc | 2737 case ADD_S: in DecodeTypeRegisterSRsType()
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| /third_party/node/deps/v8/src/execution/mips/ |
| H A D | simulator-mips.cc | 3217 case ADD_S: in DecodeTypeRegisterSRsType()
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