Searched refs:A32 (Results 1 - 11 of 11) sorted by relevance
| /third_party/elfutils/libcpu/ |
| H A D | bpf_disasm.c | 65 #define A32(O, S) REG(1) " = " REGU(1) " " #O " " S macro
174 code_fmt = A32(+, IMMS(2)); in bpf_disasm()
177 code_fmt = A32(-, IMMS(2)); in bpf_disasm()
180 code_fmt = A32(*, IMMS(2)); in bpf_disasm()
183 code_fmt = A32(/, IMMS(2)); in bpf_disasm()
186 code_fmt = A32(|, IMMX(2)); in bpf_disasm()
189 code_fmt = A32(&, IMMX(2)); in bpf_disasm()
192 code_fmt = A32(<<, IMMS(2)); in bpf_disasm()
195 code_fmt = A32(>>, IMMS(2)); in bpf_disasm()
198 code_fmt = A32( in bpf_disasm()
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| /third_party/vixl/benchmarks/aarch32/ |
| H A D | bench-dataop.cc | 65 isa == T32 ? "T32" : "A32", in benchmark()
86 benchmark(instructions, A32); in main()
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| H A D | bench-branch-masm.cc | 69 isa == T32 ? "T32" : "A32", in benchmark()
91 benchmark(iterations, A32); in main()
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| H A D | bench-literal.cc | 69 isa == T32 ? "T32" : "A32", in benchmark()
98 benchmark(iterations, literals, A32); in main()
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| H A D | bench-branch-link-masm.cc | 79 isa == T32 ? "T32" : "A32", in benchmark()
101 benchmark(iterations, A32); in main()
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| /third_party/vixl/examples/aarch32/ |
| H A D | abs.cc | 48 MacroAssembler masm(A32); in main()
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| /third_party/vixl/src/aarch32/ |
| H A D | constants-aarch32.h | 41 enum InstructionSet { A32, T32 }; enumerator
45 const InstructionSet kDefaultISA = A32;
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| H A D | location-aarch32.h | 91 VIXL_ASSERT(isa == A32); in EmitOperator()
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| H A D | assembler-aarch32.h | 112 VIXL_ASSERT(isa == A32); in Assembler()
131 VIXL_ASSERT(isa == A32); in Assembler()
148 VIXL_ASSERT(isa == A32); in Assembler()
159 VIXL_ASSERT(isa == A32); in UseInstructionSet()
170 InstructionSet GetInstructionSetInUse() const { return A32; } in GetInstructionSetInUse()
178 void UseA32() { UseInstructionSet(A32); } in UseA32()
180 bool IsUsingA32() const { return GetInstructionSetInUse() == A32; } in IsUsingA32()
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| H A D | assembler-aarch32.cc | 71 // For A32, AdavanceIT() is not called by the assembler. We must call it in PerformCheckIT()
2624 EmitOp() : Location::EmitOperator(A32) {} in adr()
3133 EmitOp() : Location::EmitOperator(A32) {} in b()
3491 EmitOp() : Location::EmitOperator(A32) {} in bl()
3579 EmitOp() : Location::EmitOperator(A32) {} in blx()
5259 EmitOp() : Location::EmitOperator(A32) {} in ldr()
5533 EmitOp() : Location::EmitOperator(A32) {} in ldrb()
5780 EmitOp() : Location::EmitOperator(A32) {} in ldrd()
6160 EmitOp() : Location::EmitOperator(A32) {} in ldrh()
6415 EmitOp() : Location::EmitOperator(A32) {} in ldrsb()
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| /third_party/vixl/test/aarch32/ |
| H A D | test-assembler-aarch32.cc | 59 // Test declared with this macro will only target A32.
62 void Test##Name() { Test##Name##Impl(A32); } \
67 // Tests declared with this macro will be run twice: once targeting A32 and
77 Test##Name##Impl(A32); \
78 printf(" > A32 done\n"); \
1855 // correctly for both A32 and T32. in TEST()
3106 VIXL_CHECK(assm.GetInstructionSetInUse() == A32); in CheckInstructionSetA32()
3122 // A32 by default. in TEST_NOASM()
3142 // Explicit A32. in TEST_NOASM()
3143 CheckInstructionSetA32(Assembler(A32)); in TEST_NOASM()
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