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/kernel/linux/linux-5.10/arch/x86/pci/
H A Dolpc.c42 0x0, 0x0, 0x0, 0x0,
43 0x0, 0x0, 0x0, 0x0,
46 0x0, 0x0,
[all...]
/kernel/linux/linux-6.6/arch/x86/pci/
H A Dolpc.c42 0x0, 0x0, 0x0, 0x0,
43 0x0, 0x0, 0x0, 0x0,
46 0x0, 0x0,
[all...]
/kernel/linux/linux-5.10/drivers/soc/samsung/
H A Dexynos5420-pmu.c18 { EXYNOS5_ARM_CORE0_SYS_PWR_REG, { 0x0, 0x0, 0x0} },
19 { EXYNOS5_DIS_IRQ_ARM_CORE0_LOCAL_SYS_PWR_REG, { 0x0, 0x0, 0x0} },
20 { EXYNOS5_DIS_IRQ_ARM_CORE0_CENTRAL_SYS_PWR_REG, { 0x0, 0x0, 0x0} },
21 { EXYNOS5_ARM_CORE1_SYS_PWR_REG, { 0x0,
[all...]
H A Dexynos4-pmu.c15 { S5P_ARM_CORE0_LOWPWR, { 0x0, 0x0, 0x2 } },
16 { S5P_DIS_IRQ_CORE0, { 0x0, 0x0, 0x0 } },
17 { S5P_DIS_IRQ_CENTRAL0, { 0x0, 0x0, 0x0 } },
18 { S5P_ARM_CORE1_LOWPWR, { 0x0, 0x0,
[all...]
H A Dexynos5250-pmu.c15 { EXYNOS5_ARM_CORE0_SYS_PWR_REG, { 0x0, 0x0, 0x2} },
16 { EXYNOS5_DIS_IRQ_ARM_CORE0_LOCAL_SYS_PWR_REG, { 0x0, 0x0, 0x0} },
17 { EXYNOS5_DIS_IRQ_ARM_CORE0_CENTRAL_SYS_PWR_REG, { 0x0, 0x0, 0x0} },
18 { EXYNOS5_ARM_CORE1_SYS_PWR_REG, { 0x0, 0x0,
[all...]
H A Dexynos3250-pmu.c15 { EXYNOS3_ARM_CORE0_SYS_PWR_REG, { 0x0, 0x0, 0x2} },
16 { EXYNOS3_DIS_IRQ_ARM_CORE0_LOCAL_SYS_PWR_REG, { 0x0, 0x0, 0x0} },
17 { EXYNOS3_DIS_IRQ_ARM_CORE0_CENTRAL_SYS_PWR_REG, { 0x0, 0x0, 0x0} },
18 { EXYNOS3_ARM_CORE1_SYS_PWR_REG, { 0x0, 0x0,
[all...]
/kernel/linux/linux-6.6/drivers/soc/samsung/
H A Dexynos5420-pmu.c18 { EXYNOS5_ARM_CORE0_SYS_PWR_REG, { 0x0, 0x0, 0x0} },
19 { EXYNOS5_DIS_IRQ_ARM_CORE0_LOCAL_SYS_PWR_REG, { 0x0, 0x0, 0x0} },
20 { EXYNOS5_DIS_IRQ_ARM_CORE0_CENTRAL_SYS_PWR_REG, { 0x0, 0x0, 0x0} },
21 { EXYNOS5_ARM_CORE1_SYS_PWR_REG, { 0x0,
[all...]
H A Dexynos4-pmu.c15 { S5P_ARM_CORE0_LOWPWR, { 0x0, 0x0, 0x2 } },
16 { S5P_DIS_IRQ_CORE0, { 0x0, 0x0, 0x0 } },
17 { S5P_DIS_IRQ_CENTRAL0, { 0x0, 0x0, 0x0 } },
18 { S5P_ARM_CORE1_LOWPWR, { 0x0, 0x0,
[all...]
H A Dexynos5250-pmu.c15 { EXYNOS5_ARM_CORE0_SYS_PWR_REG, { 0x0, 0x0, 0x2} },
16 { EXYNOS5_DIS_IRQ_ARM_CORE0_LOCAL_SYS_PWR_REG, { 0x0, 0x0, 0x0} },
17 { EXYNOS5_DIS_IRQ_ARM_CORE0_CENTRAL_SYS_PWR_REG, { 0x0, 0x0, 0x0} },
18 { EXYNOS5_ARM_CORE1_SYS_PWR_REG, { 0x0, 0x0,
[all...]
H A Dexynos3250-pmu.c15 { EXYNOS3_ARM_CORE0_SYS_PWR_REG, { 0x0, 0x0, 0x2} },
16 { EXYNOS3_DIS_IRQ_ARM_CORE0_LOCAL_SYS_PWR_REG, { 0x0, 0x0, 0x0} },
17 { EXYNOS3_DIS_IRQ_ARM_CORE0_CENTRAL_SYS_PWR_REG, { 0x0, 0x0, 0x0} },
18 { EXYNOS3_ARM_CORE1_SYS_PWR_REG, { 0x0, 0x0,
[all...]
/kernel/linux/linux-6.6/drivers/accel/habanalabs/include/gaudi2/
H A Dgaudi2_special_blocks.h16 { GAUDI2_BLOCK_TYPE_TPC, 0xfc008000, 4, 6, 0, 0x200000, 0x10000, 0x0 }, \
17 { GAUDI2_BLOCK_TYPE_TPC, 0xfc00a000, 4, 6, 0, 0x200000, 0x10000, 0x0 }, \
18 { GAUDI2_BLOCK_TYPE_TPC, 0xfc00b000, 4, 6, 0, 0x200000, 0x10000, 0x0 }, \
19 { GAUDI2_BLOCK_TYPE_TPC, 0xfc00c000, 4, 6, 0, 0x200000, 0x10000, 0x0 }, \
20 { GAUDI2_BLOCK_TYPE_HMMU, 0xfc080000, 4, 4, 0, 0x200000, 0x10000, 0x0 }, \
21 { GAUDI2_BLOCK_TYPE_HMMU, 0xfc081000, 4, 4, 0, 0x200000, 0x10000, 0x0 }, \
22 { GAUDI2_BLOCK_TYPE_HMMU, 0xfc083000, 4, 4, 0, 0x200000, 0x10000, 0x0 }, \
23 { GAUDI2_BLOCK_TYPE_HMMU, 0xfc084000, 4, 4, 0, 0x200000, 0x10000, 0x0 }, \
24 { GAUDI2_BLOCK_TYPE_MME, 0xfc0c8000, 4, 0, 0, 0x200000, 0x0, 0x0 }, \
[all...]
/kernel/linux/linux-6.6/arch/arm/boot/dts/nxp/imx/
H A Dimxrt1170-pinfunc.h17 #define IOMUXC_GPIO_LPSR_00_FLEXCAN3_TX 0x000 0x040 0x0 0x0 0x0
18 #define IOMUXC_GPIO_LPSR_00_MIC_CLK 0x000 0x040 0x0 0x1 0x0
19 #define IOMUXC_GPIO_LPSR_00_MQS_RIGHT 0x000 0x040 0x0 0x2 0x0
20 #define IOMUXC_GPIO_LPSR_00_ARM_CM4_EVENTO 0x000 0x040 0x0 0x3 0x0
21 #define IOMUXC_GPIO_LPSR_00_GPIO_MUX6_IO00 0x000 0x040 0x0
[all...]
/kernel/linux/linux-6.6/scripts/dtc/include-prefixes/arm/nxp/imx/
H A Dimxrt1170-pinfunc.h17 #define IOMUXC_GPIO_LPSR_00_FLEXCAN3_TX 0x000 0x040 0x0 0x0 0x0
18 #define IOMUXC_GPIO_LPSR_00_MIC_CLK 0x000 0x040 0x0 0x1 0x0
19 #define IOMUXC_GPIO_LPSR_00_MQS_RIGHT 0x000 0x040 0x0 0x2 0x0
20 #define IOMUXC_GPIO_LPSR_00_ARM_CM4_EVENTO 0x000 0x040 0x0 0x3 0x0
21 #define IOMUXC_GPIO_LPSR_00_GPIO_MUX6_IO00 0x000 0x040 0x0
[all...]
/kernel/linux/linux-6.6/drivers/hwmon/
H A Dintel-m10-bmc-hwmon.c39 { 0x100, 0x104, 0x108, 0x10c, 0x0, 500, "Board Temperature" },
40 { 0x110, 0x114, 0x118, 0x0, 0x0, 500, "FPGA Die Temperature" },
41 { 0x11c, 0x124, 0x120, 0x0, 0x0, 500, "QSFP0 Temperature" },
42 { 0x12c, 0x134, 0x130, 0x0, 0x0, 500, "QSFP1 Temperature" },
43 { 0x168, 0x0, 0x0, 0x0,
[all...]
/kernel/linux/linux-6.6/tools/testing/selftests/bpf/
H A Dip_check_defrag_frags.h10 0x45, 0x0, 0x0, 0x2c, 0x0, 0x1, 0x20, 0x0, 0x40, 0x11,
11 0xac, 0xe8, 0x0, 0x0, 0x0, 0x0, 0xac, 0x10, 0x1, 0xc8,
12 0xbe, 0xee, 0xbe, 0xef, 0x0, 0x3a, 0x0,
[all...]
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/include/asic_reg/mp/
H A Dmp_11_0_sh_mask.h28 #define MP0_SMN_C2PMSG_32__CONTENT__SHIFT 0x0
31 #define MP0_SMN_C2PMSG_33__CONTENT__SHIFT 0x0
34 #define MP0_SMN_C2PMSG_34__CONTENT__SHIFT 0x0
37 #define MP0_SMN_C2PMSG_35__CONTENT__SHIFT 0x0
40 #define MP0_SMN_C2PMSG_36__CONTENT__SHIFT 0x0
43 #define MP0_SMN_C2PMSG_37__CONTENT__SHIFT 0x0
46 #define MP0_SMN_C2PMSG_38__CONTENT__SHIFT 0x0
49 #define MP0_SMN_C2PMSG_39__CONTENT__SHIFT 0x0
52 #define MP0_SMN_C2PMSG_40__CONTENT__SHIFT 0x0
55 #define MP0_SMN_C2PMSG_41__CONTENT__SHIFT 0x0
[all...]
H A Dmp_10_0_sh_mask.h27 #define MP0_SMN_C2PMSG_32__CONTENT__SHIFT 0x0
30 #define MP0_SMN_C2PMSG_33__CONTENT__SHIFT 0x0
33 #define MP0_SMN_C2PMSG_34__CONTENT__SHIFT 0x0
36 #define MP0_SMN_C2PMSG_35__CONTENT__SHIFT 0x0
39 #define MP0_SMN_C2PMSG_36__CONTENT__SHIFT 0x0
42 #define MP0_SMN_C2PMSG_37__CONTENT__SHIFT 0x0
45 #define MP0_SMN_C2PMSG_38__CONTENT__SHIFT 0x0
48 #define MP0_SMN_C2PMSG_39__CONTENT__SHIFT 0x0
51 #define MP0_SMN_C2PMSG_40__CONTENT__SHIFT 0x0
54 #define MP0_SMN_C2PMSG_41__CONTENT__SHIFT 0x0
[all...]
H A Dmp_12_0_0_sh_mask.h27 #define MP0_SMN_C2PMSG_32__CONTENT__SHIFT 0x0
30 #define MP0_SMN_C2PMSG_33__CONTENT__SHIFT 0x0
33 #define MP0_SMN_C2PMSG_34__CONTENT__SHIFT 0x0
36 #define MP0_SMN_C2PMSG_35__CONTENT__SHIFT 0x0
39 #define MP0_SMN_C2PMSG_36__CONTENT__SHIFT 0x0
42 #define MP0_SMN_C2PMSG_37__CONTENT__SHIFT 0x0
45 #define MP0_SMN_C2PMSG_38__CONTENT__SHIFT 0x0
48 #define MP0_SMN_C2PMSG_39__CONTENT__SHIFT 0x0
51 #define MP0_SMN_C2PMSG_40__CONTENT__SHIFT 0x0
54 #define MP0_SMN_C2PMSG_41__CONTENT__SHIFT 0x0
[all...]
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/include/asic_reg/mp/
H A Dmp_11_0_sh_mask.h28 #define MP0_SMN_C2PMSG_32__CONTENT__SHIFT 0x0
31 #define MP0_SMN_C2PMSG_33__CONTENT__SHIFT 0x0
34 #define MP0_SMN_C2PMSG_34__CONTENT__SHIFT 0x0
37 #define MP0_SMN_C2PMSG_35__CONTENT__SHIFT 0x0
40 #define MP0_SMN_C2PMSG_36__CONTENT__SHIFT 0x0
43 #define MP0_SMN_C2PMSG_37__CONTENT__SHIFT 0x0
46 #define MP0_SMN_C2PMSG_38__CONTENT__SHIFT 0x0
49 #define MP0_SMN_C2PMSG_39__CONTENT__SHIFT 0x0
52 #define MP0_SMN_C2PMSG_40__CONTENT__SHIFT 0x0
55 #define MP0_SMN_C2PMSG_41__CONTENT__SHIFT 0x0
[all...]
H A Dmp_11_5_0_sh_mask.h27 #define MP0_SMN_C2PMSG_32__CONTENT__SHIFT 0x0
30 #define MP0_SMN_C2PMSG_33__CONTENT__SHIFT 0x0
33 #define MP0_SMN_C2PMSG_34__CONTENT__SHIFT 0x0
36 #define MP0_SMN_C2PMSG_35__CONTENT__SHIFT 0x0
39 #define MP0_SMN_C2PMSG_36__CONTENT__SHIFT 0x0
42 #define MP0_SMN_C2PMSG_37__CONTENT__SHIFT 0x0
45 #define MP0_SMN_C2PMSG_38__CONTENT__SHIFT 0x0
48 #define MP0_SMN_C2PMSG_39__CONTENT__SHIFT 0x0
51 #define MP0_SMN_C2PMSG_40__CONTENT__SHIFT 0x0
54 #define MP0_SMN_C2PMSG_41__CONTENT__SHIFT 0x0
[all...]
H A Dmp_10_0_sh_mask.h27 #define MP0_SMN_C2PMSG_32__CONTENT__SHIFT 0x0
30 #define MP0_SMN_C2PMSG_33__CONTENT__SHIFT 0x0
33 #define MP0_SMN_C2PMSG_34__CONTENT__SHIFT 0x0
36 #define MP0_SMN_C2PMSG_35__CONTENT__SHIFT 0x0
39 #define MP0_SMN_C2PMSG_36__CONTENT__SHIFT 0x0
42 #define MP0_SMN_C2PMSG_37__CONTENT__SHIFT 0x0
45 #define MP0_SMN_C2PMSG_38__CONTENT__SHIFT 0x0
48 #define MP0_SMN_C2PMSG_39__CONTENT__SHIFT 0x0
51 #define MP0_SMN_C2PMSG_40__CONTENT__SHIFT 0x0
54 #define MP0_SMN_C2PMSG_41__CONTENT__SHIFT 0x0
[all...]
H A Dmp_12_0_0_sh_mask.h27 #define MP0_SMN_C2PMSG_32__CONTENT__SHIFT 0x0
30 #define MP0_SMN_C2PMSG_33__CONTENT__SHIFT 0x0
33 #define MP0_SMN_C2PMSG_34__CONTENT__SHIFT 0x0
36 #define MP0_SMN_C2PMSG_35__CONTENT__SHIFT 0x0
39 #define MP0_SMN_C2PMSG_36__CONTENT__SHIFT 0x0
42 #define MP0_SMN_C2PMSG_37__CONTENT__SHIFT 0x0
45 #define MP0_SMN_C2PMSG_38__CONTENT__SHIFT 0x0
48 #define MP0_SMN_C2PMSG_39__CONTENT__SHIFT 0x0
51 #define MP0_SMN_C2PMSG_40__CONTENT__SHIFT 0x0
54 #define MP0_SMN_C2PMSG_41__CONTENT__SHIFT 0x0
[all...]
/kernel/linux/linux-5.10/arch/arm64/boot/dts/freescale/
H A Dimx8mq-pinfunc.h15 #define MX8MQ_IOMUXC_PMIC_STBY_REQ_CCMSRCGPCMIX_PMIC_STBY_REQ 0x014 0x27C 0x000 0x0 0x0
16 #define MX8MQ_IOMUXC_PMIC_ON_REQ_SNVSMIX_PMIC_ON_REQ 0x018 0x280 0x000 0x0 0x0
17 #define MX8MQ_IOMUXC_ONOFF_SNVSMIX_ONOFF 0x01C 0x284 0x000 0x0 0x0
18 #define MX8MQ_IOMUXC_POR_B_SNVSMIX_POR_B 0x020 0x288 0x000 0x0 0x0
19 #define MX8MQ_IOMUXC_RTC_RESET_B_SNVSMIX_RTC_RESET_B 0x024 0x28C 0x000 0x0 0x0
[all...]
/kernel/linux/linux-6.6/arch/arm64/boot/dts/freescale/
H A Dimx8mq-pinfunc.h15 #define MX8MQ_IOMUXC_PMIC_STBY_REQ_CCMSRCGPCMIX_PMIC_STBY_REQ 0x014 0x27C 0x000 0x0 0x0
16 #define MX8MQ_IOMUXC_PMIC_ON_REQ_SNVSMIX_PMIC_ON_REQ 0x018 0x280 0x000 0x0 0x0
17 #define MX8MQ_IOMUXC_ONOFF_SNVSMIX_ONOFF 0x01C 0x284 0x000 0x0 0x0
18 #define MX8MQ_IOMUXC_POR_B_SNVSMIX_POR_B 0x020 0x288 0x000 0x0 0x0
19 #define MX8MQ_IOMUXC_RTC_RESET_B_SNVSMIX_RTC_RESET_B 0x024 0x28C 0x000 0x0 0x0
[all...]
/kernel/linux/linux-5.10/scripts/dtc/include-prefixes/arm64/freescale/
H A Dimx8mq-pinfunc.h15 #define MX8MQ_IOMUXC_PMIC_STBY_REQ_CCMSRCGPCMIX_PMIC_STBY_REQ 0x014 0x27C 0x000 0x0 0x0
16 #define MX8MQ_IOMUXC_PMIC_ON_REQ_SNVSMIX_PMIC_ON_REQ 0x018 0x280 0x000 0x0 0x0
17 #define MX8MQ_IOMUXC_ONOFF_SNVSMIX_ONOFF 0x01C 0x284 0x000 0x0 0x0
18 #define MX8MQ_IOMUXC_POR_B_SNVSMIX_POR_B 0x020 0x288 0x000 0x0 0x0
19 #define MX8MQ_IOMUXC_RTC_RESET_B_SNVSMIX_RTC_RESET_B 0x024 0x28C 0x000 0x0 0x0
[all...]

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