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Searched refs:tg_inst (Results 1 - 21 of 21) sorted by relevance

/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/dce/
H A Ddce_hwseq.c177 unsigned int tg_inst) in dce_crtc_switch_to_clk_src()
180 REG_UPDATE(PIXEL_RATE_CNTL[tg_inst], in dce_crtc_switch_to_clk_src()
186 REG_UPDATE_2(PHYPLL_PIXEL_RATE_CNTL[tg_inst], in dce_crtc_switch_to_clk_src()
190 REG_UPDATE(PIXEL_RATE_CNTL[tg_inst], in dce_crtc_switch_to_clk_src()
196 REG_UPDATE_2(PIXEL_RATE_CNTL[tg_inst], in dce_crtc_switch_to_clk_src()
200 if (REG(PHYPLL_PIXEL_RATE_CNTL[tg_inst])) in dce_crtc_switch_to_clk_src()
201 REG_UPDATE(PHYPLL_PIXEL_RATE_CNTL[tg_inst], in dce_crtc_switch_to_clk_src()
205 clk_src->id, tg_inst); in dce_crtc_switch_to_clk_src()
175 dce_crtc_switch_to_clk_src(struct dce_hwseq *hws, struct clock_source *clk_src, unsigned int tg_inst) dce_crtc_switch_to_clk_src() argument
H A Ddce_stream_encoder.c1589 int tg_inst, bool enable) in setup_stereo_sync()
1592 REG_UPDATE(DIG_FE_CNTL, DIG_STEREOSYNC_SELECT, tg_inst); in setup_stereo_sync()
1598 int tg_inst) in dig_connect_to_otg()
1602 REG_UPDATE(DIG_FE_CNTL, DIG_SOURCE_SELECT, tg_inst); in dig_connect_to_otg()
1608 uint32_t tg_inst = 0; in dig_source_otg() local
1611 REG_GET(DIG_FE_CNTL, DIG_SOURCE_SELECT, &tg_inst); in dig_source_otg()
1613 return tg_inst; in dig_source_otg()
1587 setup_stereo_sync( struct stream_encoder *enc, int tg_inst, bool enable) setup_stereo_sync() argument
1596 dig_connect_to_otg( struct stream_encoder *enc, int tg_inst) dig_connect_to_otg() argument
H A Ddce_hwseq.h862 unsigned int tg_inst);
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dce/
H A Ddce_hwseq.c177 unsigned int tg_inst) in dce_crtc_switch_to_clk_src()
180 REG_UPDATE(PIXEL_RATE_CNTL[tg_inst], in dce_crtc_switch_to_clk_src()
186 REG_UPDATE_2(PHYPLL_PIXEL_RATE_CNTL[tg_inst], in dce_crtc_switch_to_clk_src()
190 REG_UPDATE(PIXEL_RATE_CNTL[tg_inst], in dce_crtc_switch_to_clk_src()
196 REG_UPDATE_2(PIXEL_RATE_CNTL[tg_inst], in dce_crtc_switch_to_clk_src()
200 if (REG(PHYPLL_PIXEL_RATE_CNTL[tg_inst])) in dce_crtc_switch_to_clk_src()
201 REG_UPDATE(PHYPLL_PIXEL_RATE_CNTL[tg_inst], in dce_crtc_switch_to_clk_src()
205 clk_src->id, tg_inst); in dce_crtc_switch_to_clk_src()
175 dce_crtc_switch_to_clk_src(struct dce_hwseq *hws, struct clock_source *clk_src, unsigned int tg_inst) dce_crtc_switch_to_clk_src() argument
H A Ddce_stream_encoder.c1488 int tg_inst, bool enable) in setup_stereo_sync()
1491 REG_UPDATE(DIG_FE_CNTL, DIG_STEREOSYNC_SELECT, tg_inst); in setup_stereo_sync()
1497 int tg_inst) in dig_connect_to_otg()
1501 REG_UPDATE(DIG_FE_CNTL, DIG_SOURCE_SELECT, tg_inst); in dig_connect_to_otg()
1507 uint32_t tg_inst = 0; in dig_source_otg() local
1510 REG_GET(DIG_FE_CNTL, DIG_SOURCE_SELECT, &tg_inst); in dig_source_otg()
1512 return tg_inst; in dig_source_otg()
1486 setup_stereo_sync( struct stream_encoder *enc, int tg_inst, bool enable) setup_stereo_sync() argument
1495 dig_connect_to_otg( struct stream_encoder *enc, int tg_inst) dig_connect_to_otg() argument
H A Ddce_hwseq.h1218 unsigned int tg_inst);
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/
H A Ddc_dmub_srv.h72 void dc_dmub_srv_drr_update_cmd(struct dc *dc, uint32_t tg_inst, uint32_t vtotal_min, uint32_t vtotal_max);
74 void dc_dmub_srv_set_drr_manual_trigger_cmd(struct dc *dc, uint32_t tg_inst);
H A Ddc_dmub_srv.c256 void dc_dmub_srv_drr_update_cmd(struct dc *dc, uint32_t tg_inst, uint32_t vtotal_min, uint32_t vtotal_max) in dc_dmub_srv_drr_update_cmd() argument
264 cmd.drr_update.dmub_optc_state_req.tg_inst = tg_inst; in dc_dmub_srv_drr_update_cmd()
272 void dc_dmub_srv_set_drr_manual_trigger_cmd(struct dc *dc, uint32_t tg_inst) in dc_dmub_srv_set_drr_manual_trigger_cmd() argument
278 cmd.drr_update.dmub_optc_state_req.tg_inst = tg_inst; in dc_dmub_srv_set_drr_manual_trigger_cmd()
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/virtual/
H A Dvirtual_stream_encoder.c93 int tg_inst) in virtual_dig_connect_to_otg()
98 int tg_inst, in virtual_setup_stereo_sync()
91 virtual_dig_connect_to_otg( struct stream_encoder *enc, int tg_inst) virtual_dig_connect_to_otg() argument
96 virtual_setup_stereo_sync( struct stream_encoder *enc, int tg_inst, bool enable) virtual_setup_stereo_sync() argument
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/virtual/
H A Dvirtual_stream_encoder.c93 int tg_inst) in virtual_dig_connect_to_otg()
98 int tg_inst, in virtual_setup_stereo_sync()
91 virtual_dig_connect_to_otg( struct stream_encoder *enc, int tg_inst) virtual_dig_connect_to_otg() argument
96 virtual_setup_stereo_sync( struct stream_encoder *enc, int tg_inst, bool enable) virtual_setup_stereo_sync() argument
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/inc/hw/
H A Dstream_encoder.h201 int tg_inst,
209 int tg_inst);
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/dcn10/
H A Ddcn10_stream_encoder.c1525 int tg_inst, bool enable) in enc1_setup_stereo_sync()
1528 REG_UPDATE(DIG_FE_CNTL, DIG_STEREOSYNC_SELECT, tg_inst); in enc1_setup_stereo_sync()
1534 int tg_inst) in enc1_dig_connect_to_otg()
1538 REG_UPDATE(DIG_FE_CNTL, DIG_SOURCE_SELECT, tg_inst); in enc1_dig_connect_to_otg()
1544 uint32_t tg_inst = 0; in enc1_dig_source_otg() local
1547 REG_GET(DIG_FE_CNTL, DIG_SOURCE_SELECT, &tg_inst); in enc1_dig_source_otg()
1549 return tg_inst; in enc1_dig_source_otg()
1523 enc1_setup_stereo_sync( struct stream_encoder *enc, int tg_inst, bool enable) enc1_setup_stereo_sync() argument
1532 enc1_dig_connect_to_otg( struct stream_encoder *enc, int tg_inst) enc1_dig_connect_to_otg() argument
H A Ddcn10_stream_encoder.h616 int tg_inst, bool enable);
648 int tg_inst);
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dcn10/
H A Ddcn10_stream_encoder.c1483 int tg_inst, bool enable) in enc1_setup_stereo_sync()
1486 REG_UPDATE(DIG_FE_CNTL, DIG_STEREOSYNC_SELECT, tg_inst); in enc1_setup_stereo_sync()
1492 int tg_inst) in enc1_dig_connect_to_otg()
1496 REG_UPDATE(DIG_FE_CNTL, DIG_SOURCE_SELECT, tg_inst); in enc1_dig_connect_to_otg()
1502 uint32_t tg_inst = 0; in enc1_dig_source_otg() local
1505 REG_GET(DIG_FE_CNTL, DIG_SOURCE_SELECT, &tg_inst); in enc1_dig_source_otg()
1507 return tg_inst; in enc1_dig_source_otg()
1481 enc1_setup_stereo_sync( struct stream_encoder *enc, int tg_inst, bool enable) enc1_setup_stereo_sync() argument
1490 enc1_dig_connect_to_otg( struct stream_encoder *enc, int tg_inst) enc1_dig_connect_to_otg() argument
H A Ddcn10_stream_encoder.h666 int tg_inst, bool enable);
698 int tg_inst);
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/core/
H A Ddc_resource.c2005 unsigned int i, inst, tg_inst = 0; in acquire_resource_from_hw_enabled_state() local
2018 tg_inst = pool->stream_enc[i]->funcs->dig_source_otg( in acquire_resource_from_hw_enabled_state()
2024 // tg_inst not found in acquire_resource_from_hw_enabled_state()
2028 if (tg_inst >= pool->timing_generator_count) in acquire_resource_from_hw_enabled_state()
2031 if (!res_ctx->pipe_ctx[tg_inst].stream) { in acquire_resource_from_hw_enabled_state()
2032 struct pipe_ctx *pipe_ctx = &res_ctx->pipe_ctx[tg_inst]; in acquire_resource_from_hw_enabled_state()
2034 pipe_ctx->stream_res.tg = pool->timing_generators[tg_inst]; in acquire_resource_from_hw_enabled_state()
2035 pipe_ctx->plane_res.mi = pool->mis[tg_inst]; in acquire_resource_from_hw_enabled_state()
2036 pipe_ctx->plane_res.hubp = pool->hubps[tg_inst]; in acquire_resource_from_hw_enabled_state()
2037 pipe_ctx->plane_res.ipp = pool->ipps[tg_inst]; in acquire_resource_from_hw_enabled_state()
[all...]
H A Ddc.c881 unsigned int enc_inst, tg_inst = 0; in disable_vbios_mode_if_required() local
888 tg_inst = dc->res_pool->stream_enc[j]->funcs->dig_source_otg( in disable_vbios_mode_if_required()
896 tg_inst, &pix_clk_100hz); in disable_vbios_mode_if_required()
1176 unsigned int i, enc_inst, tg_inst = 0; in dc_validate_seamless_boot_timing() local
1197 tg_inst = dc->res_pool->stream_enc[i]->funcs->dig_source_otg( in dc_validate_seamless_boot_timing()
1203 // tg_inst not found in dc_validate_seamless_boot_timing()
1207 if (tg_inst >= dc->res_pool->timing_generator_count) in dc_validate_seamless_boot_timing()
1210 tg = dc->res_pool->timing_generators[tg_inst]; in dc_validate_seamless_boot_timing()
1259 tg_inst, &pix_clk_100hz); in dc_validate_seamless_boot_timing()
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/inc/hw/
H A Dstream_encoder.h219 int tg_inst,
227 int tg_inst);
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/core/
H A Ddc_resource.c2349 int tg_inst = pool->timing_generator_count - 1; in acquire_first_free_pipe() local
2351 pipe_ctx->stream_res.tg = pool->timing_generators[tg_inst]; in acquire_first_free_pipe()
2352 pipe_ctx->stream_res.opp = pool->opps[tg_inst]; in acquire_first_free_pipe()
2596 unsigned int i, inst, tg_inst = 0; in acquire_resource_from_hw_enabled_state() local
2611 tg_inst = pool->stream_enc[i]->funcs->dig_source_otg( in acquire_resource_from_hw_enabled_state()
2617 // tg_inst not found in acquire_resource_from_hw_enabled_state()
2621 if (tg_inst >= pool->timing_generator_count) in acquire_resource_from_hw_enabled_state()
2624 if (!res_ctx->pipe_ctx[tg_inst].stream) { in acquire_resource_from_hw_enabled_state()
2625 struct pipe_ctx *pipe_ctx = &res_ctx->pipe_ctx[tg_inst]; in acquire_resource_from_hw_enabled_state()
2627 pipe_ctx->stream_res.tg = pool->timing_generators[tg_inst]; in acquire_resource_from_hw_enabled_state()
[all...]
H A Ddc.c1233 unsigned int enc_inst, tg_inst = 0; in disable_vbios_mode_if_required() local
1240 tg_inst = dc->res_pool->stream_enc[j]->funcs->dig_source_otg( in disable_vbios_mode_if_required()
1248 tg_inst, &pix_clk_100hz); in disable_vbios_mode_if_required()
1582 unsigned int i, enc_inst, tg_inst = 0; in dc_validate_boot_timing() local
1606 tg_inst = dc->res_pool->stream_enc[i]->funcs->dig_source_otg( in dc_validate_boot_timing()
1612 // tg_inst not found in dc_validate_boot_timing()
1616 if (tg_inst >= dc->res_pool->timing_generator_count) in dc_validate_boot_timing()
1619 if (tg_inst != link->link_enc->preferred_engine) in dc_validate_boot_timing()
1622 tg = dc->res_pool->timing_generators[tg_inst]; in dc_validate_boot_timing()
1677 tg_inst, in dc_validate_boot_timing()
[all...]
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dmub/inc/
H A Ddmub_cmd.h3681 uint32_t tg_inst; member

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