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/kernel/linux/linux-5.10/arch/loongarch/mm/
H A Dtlbex.S31 la.abs t0, do_page_fault
32 jirl ra, t0, 0
48 la.abs t0, do_page_fault
49 jirl ra, t0, 0
55 csrwr t0, EXCEPTION_KS0
62 csrrd t0, LOONGARCH_CSR_BADV
63 bltz t0, vmalloc_load
68 bstrpick.d ra, t0, PTRS_PER_PGD_BITS + PGDIR_SHIFT - 1, PGDIR_SHIFT
72 bstrpick.d ra, t0, PTRS_PER_PUD_BITS + PUD_SHIFT - 1, PUD_SHIFT
77 bstrpick.d ra, t0, PTRS_PER_PMD_BIT
[all...]
/kernel/linux/linux-6.6/arch/loongarch/mm/
H A Dtlbex.S41 la_abs t0, do_page_fault
42 jirl ra, t0, 0
47 csrwr t0, EXCEPTION_KS0
54 csrrd t0, LOONGARCH_CSR_BADV
55 bltz t0, vmalloc_load
60 bstrpick.d ra, t0, PTRS_PER_PGD_BITS + PGDIR_SHIFT - 1, PGDIR_SHIFT
64 bstrpick.d ra, t0, PTRS_PER_PUD_BITS + PUD_SHIFT - 1, PUD_SHIFT
69 bstrpick.d ra, t0, PTRS_PER_PMD_BITS + PMD_SHIFT - 1, PMD_SHIFT
83 bstrpick.d t0, t0, PTRS_PER_PTE_BIT
[all...]
/kernel/linux/linux-5.10/arch/mips/kernel/
H A Dcps-vec.S117 li t0, CAUSEF_IV
118 mtc0 t0, CP0_CAUSE
121 li t0, ST0_CU1 | ST0_CU0 | ST0_BEV | STATUS_BITDEPS
122 mtc0 t0, CP0_STATUS
135 li t0, 0xff
136 sw t0, GCR_CL_COHERENCE_OFS(v1)
140 1: mfc0 t0, CP0_CONFIG
141 ori t0, 0x7
142 xori t0, 0x7
143 or t0, t
[all...]
H A Dbmips_5xxx_init.S33 and t0, kva, t2 ; \
36 9: cache op, 0(t0) ; \
37 bne t0, t1, 9b ; \
38 addu t0, linesize ; \
113 * Trashes: v0, v1, a0, t0
123 move t0, a0
150 move a0, t0
178 move a0, t0
208 * Trashes: v0, v1, a0, t0
216 move t0, a
[all...]
H A Docteon_switch.S34 dmfc0 t0, $11,7 /* CvmMemCtl */
35 bbit0 t0, 6, 3f /* Is user access enabled? */
39 andi t0, 0x3f
41 sll t0, 7-LONGLOG-1
48 subu t0, 1 /* Decrement loop var */
53 bnez t0, 2b /* Loop until we've copied it all */
58 dmfc0 t0, $11,7 /* CvmMemCtl */
59 xori t0, t0, 0x40 /* Bit 6 is CVMSEG user enable */
60 dmtc0 t0,
[all...]
/kernel/linux/linux-6.6/arch/mips/kernel/
H A Dcps-vec.S112 li t0, CAUSEF_IV
113 mtc0 t0, CP0_CAUSE
116 li t0, ST0_CU1 | ST0_CU0 | ST0_BEV | STATUS_BITDEPS
117 mtc0 t0, CP0_STATUS
131 li t0, 0xff
132 sw t0, GCR_CL_COHERENCE_OFS(s1)
137 1: mfc0 t0, CP0_CONFIG
138 ori t0, 0x7
139 xori t0, 0x7
140 or t0, t
[all...]
H A Dbmips_5xxx_init.S33 and t0, kva, t2 ; \
36 9: cache op, 0(t0) ; \
37 bne t0, t1, 9b ; \
38 addu t0, linesize ; \
113 * Trashes: v0, v1, a0, t0
123 move t0, a0
150 move a0, t0
178 move a0, t0
208 * Trashes: v0, v1, a0, t0
216 move t0, a
[all...]
H A Docteon_switch.S33 dmfc0 t0, $11,7 /* CvmMemCtl */
34 bbit0 t0, 6, 3f /* Is user access enabled? */
38 andi t0, 0x3f
40 sll t0, 7-LONGLOG-1
47 subu t0, 1 /* Decrement loop var */
52 bnez t0, 2b /* Loop until we've copied it all */
57 dmfc0 t0, $11,7 /* CvmMemCtl */
58 xori t0, t0, 0x40 /* Bit 6 is CVMSEG user enable */
59 dmtc0 t0,
[all...]
/kernel/linux/linux-5.10/drivers/soc/bcm/brcmstb/pm/
H A Ds3-mips.S25 la t0, gp_regs
26 sw ra, 0(t0)
27 sw s0, 4(t0)
28 sw s1, 8(t0)
29 sw s2, 12(t0)
30 sw s3, 16(t0)
31 sw s4, 20(t0)
32 sw s5, 24(t0)
33 sw s6, 28(t0)
34 sw s7, 32(t0)
[all...]
H A Ds2-mips.S42 move t0, a0
44 lw s0, 0(t0)
45 lw s1, 4(t0)
46 lw s2, 8(t0)
47 lw s3, 12(t0)
48 lw s4, 16(t0)
49 lw s5, 20(t0)
55 la t0, brcm_pm_do_s2
56 and t0, t1
61 1: cache 0x1c, 0(t0)
[all...]
/kernel/linux/linux-6.6/drivers/soc/bcm/brcmstb/pm/
H A Ds3-mips.S25 la t0, gp_regs
26 sw ra, 0(t0)
27 sw s0, 4(t0)
28 sw s1, 8(t0)
29 sw s2, 12(t0)
30 sw s3, 16(t0)
31 sw s4, 20(t0)
32 sw s5, 24(t0)
33 sw s6, 28(t0)
34 sw s7, 32(t0)
[all...]
H A Ds2-mips.S42 move t0, a0
44 lw s0, 0(t0)
45 lw s1, 4(t0)
46 lw s2, 8(t0)
47 lw s3, 12(t0)
48 lw s4, 16(t0)
49 lw s5, 20(t0)
55 la t0, brcm_pm_do_s2
56 and t0, t1
61 1: cache 0x1c, 0(t0)
[all...]
/kernel/linux/linux-6.6/arch/loongarch/kernel/
H A Dhead.S48 li.d t0, CSR_DMW0_INIT # UC, PLV0, 0x8000 xxxx xxxx xxxx
49 csrwr t0, LOONGARCH_CSR_DMWIN0
50 li.d t0, CSR_DMW1_INIT # CA, PLV0, 0x9000 xxxx xxxx xxxx
51 csrwr t0, LOONGARCH_CSR_DMWIN1
53 JUMP_VIRT_ADDR t0, t1
56 li.w t0, 0xb0 # PLV=0, IE=0, PG=1
57 csrwr t0, LOONGARCH_CSR_CRMD
58 li.w t0, 0x04 # PLV=0, PIE=1, PWE=0
59 csrwr t0, LOONGARCH_CSR_PRMD
60 li.w t0,
[all...]
/kernel/linux/linux-5.10/arch/mips/include/asm/mach-loongson64/
H A Dkernel-entry-init.h23 mfc0 t0, CP0_CONFIG3
24 or t0, (0x1 << 7) variable
25 mtc0 t0, CP0_CONFIG3 variable
27 mfc0 t0, CP0_PAGEGRAIN variable
28 or t0, (0x1 << 29) variable
29 mtc0 t0, CP0_PAGEGRAIN variable
31 mfc0 t0, CP0_PRID variable
33 andi t1, t0, PRID_IMP_MASK variable
38 andi t0, (PRID_IMP_MASK | PRID_REV_MASK) variable
39 slti t0, t variable
40 bnez t0, 2f global() variable
43 mfc0 t0, CP0_CONFIG6 global() variable
44 or t0, 0x100 global() variable
45 mtc0 t0, CP0_CONFIG6 global() variable
59 or t0, (0x1 << 7) global() variable
60 mtc0 t0, CP0_CONFIG3 global() variable
62 mfc0 t0, CP0_PAGEGRAIN global() variable
63 or t0, (0x1 << 29) global() variable
64 mtc0 t0, CP0_PAGEGRAIN global() variable
66 mfc0 t0, CP0_PRID global() variable
68 andi t1, t0, PRID_IMP_MASK global() variable
73 andi t0, (PRID_IMP_MASK | PRID_REV_MASK) global() variable
74 slti t0, t0, (PRID_IMP_LOONGSON_64C | PRID_REV_LOONGSON3A_R2_0) global() variable
75 bnez t0, 2f global() variable
78 mfc0 t0, CP0_CONFIG6 global() variable
79 or t0, 0x100 global() variable
80 mtc0 t0, CP0_CONFIG6 global() variable
[all...]
/kernel/linux/linux-5.10/arch/mips/netlogic/common/
H A Dreset.S59 li t0, LSU_DEFEATURE
60 mfcr t1, t0
64 mtcr t1, t0
66 li t0, ICU_DEFEATURE
67 mfcr t1, t0
69 mtcr t1, t0
71 li t0, SCHED_DEFEATURE
73 mtcr t1, t0
82 mfc0 t0, CP0_PAGEMASK, 1
84 or t0, t
[all...]
/kernel/linux/linux-5.10/arch/mips/include/asm/mach-ip27/
H A Dkernel-entry-init.h34 dli t0, 0xffffffffc0000000
35 dmtc0 t0, CP0_ENTRYHI variable
36 li t0, 0x1c000 # Offset of text into node memory variable
39 or t1, t1, t0 # Physical load address of kernel text
40 or t2, t2, t0 # Physical load address of kernel data
45 li t0, ((PAGE_GLOBAL | PAGE_VALID | CACHE_CACHABLE_COW) >> 6) variable
46 or t0, t0, t1 variable
47 mtc0 t0, CP0_ENTRYLO0 # physaddr, VG, cach exlwr variable
48 li t0, ((PAGE_GLOBA variable
49 or t0, t0, t2 global() variable
50 mtc0 t0, CP0_ENTRYLO1 # physaddr, DVG, cach exlwr global() variable
51 li t0, 0x1ffe000 # MAPPED_KERN_TLBMASK, TLBPGMASK_16M global() variable
52 mtc0 t0, CP0_PAGEMASK global() variable
53 li t0, 0 # KMAP_INX global() variable
54 mtc0 t0, CP0_INDEX global() variable
55 li t0, 1 global() variable
56 mtc0 t0, CP0_WIRED global() variable
81 or t0, t0, t1 global() variable
82 ld t0, 0(t0) # t0 points to kern_vars struct global() variable
91 PTR_LA t0, 0f global() variable
[all...]
/kernel/linux/linux-6.6/arch/mips/include/asm/mach-ip27/
H A Dkernel-entry-init.h34 dli t0, 0xffffffffc0000000
35 dmtc0 t0, CP0_ENTRYHI variable
36 li t0, 0x1c000 # Offset of text into node memory variable
39 or t1, t1, t0 # Physical load address of kernel text
40 or t2, t2, t0 # Physical load address of kernel data
45 li t0, ((PAGE_GLOBAL | PAGE_VALID | CACHE_CACHABLE_COW) >> 6) variable
46 or t0, t0, t1 variable
47 mtc0 t0, CP0_ENTRYLO0 # physaddr, VG, cach exlwr variable
48 li t0, ((PAGE_GLOBA variable
49 or t0, t0, t2 global() variable
50 mtc0 t0, CP0_ENTRYLO1 # physaddr, DVG, cach exlwr global() variable
51 li t0, 0x1ffe000 # MAPPED_KERN_TLBMASK, TLBPGMASK_16M global() variable
52 mtc0 t0, CP0_PAGEMASK global() variable
53 li t0, 0 # KMAP_INX global() variable
54 mtc0 t0, CP0_INDEX global() variable
55 li t0, 1 global() variable
56 mtc0 t0, CP0_WIRED global() variable
81 or t0, t0, t1 global() variable
82 ld t0, 0(t0) # t0 points to kern_vars struct global() variable
91 PTR_LA t0, 0f global() variable
[all...]
/kernel/linux/linux-5.10/arch/mips/net/
H A Dbpf_jit_asm.S49 slti t0, offset, 0; \
50 bgtz t0, bpf_slow_path_##TYPE##_neg; \
56 slt t0, $r_s0, offset; \
57 bgtz t0, bpf_slow_path_##TYPE; \
70 wsbh t0, $r_A
71 rotr $r_A, t0, 16
73 sll t0, $r_A, 24
76 or t0, t0, t1
79 or t0, t
[all...]
/kernel/linux/linux-6.6/arch/mips/include/asm/mach-loongson64/
H A Dkernel-entry-init.h23 mfc0 t0, CP0_PAGEGRAIN
24 or t0, (0x1 << 29) variable
25 mtc0 t0, CP0_PAGEGRAIN variable
27 mfc0 t0, CP0_PRID variable
29 andi t1, t0, PRID_IMP_MASK variable
34 andi t0, (PRID_IMP_MASK | PRID_REV_MASK) variable
35 slti t0, t0, (PRID_IMP_LOONGSON_64C | PRID_REV_LOONGSON3A_R2_0) variable
36 bnez t0, 2f variable
39 mfc0 t0, CP0_CONFIG variable
40 or t0, 0x100 global() variable
41 mtc0 t0, CP0_CONFIG6 global() variable
55 or t0, (0x1 << 29) global() variable
56 mtc0 t0, CP0_PAGEGRAIN global() variable
58 mfc0 t0, CP0_PRID global() variable
60 andi t1, t0, PRID_IMP_MASK global() variable
65 andi t0, (PRID_IMP_MASK | PRID_REV_MASK) global() variable
66 slti t0, t0, (PRID_IMP_LOONGSON_64C | PRID_REV_LOONGSON3A_R2_0) global() variable
67 bnez t0, 2f global() variable
70 mfc0 t0, CP0_CONFIG6 global() variable
71 or t0, 0x100 global() variable
72 mtc0 t0, CP0_CONFIG6 global() variable
[all...]
/kernel/linux/linux-5.10/arch/arm/crypto/
H A Dsha512-armv4.pl73 $t0="r9";
97 mov $t0,$Elo,lsr#14
101 eor $t0,$t0,$Ehi,lsl#18
105 eor $t0,$t0,$Elo,lsr#18
107 eor $t0,$t0,$Ehi,lsl#14
109 eor $t0,$t0,
[all...]
/kernel/linux/linux-6.6/arch/arm/crypto/
H A Dsha512-armv4.pl73 $t0="r9";
97 mov $t0,$Elo,lsr#14
101 eor $t0,$t0,$Ehi,lsl#18
105 eor $t0,$t0,$Elo,lsr#18
107 eor $t0,$t0,$Ehi,lsl#14
109 eor $t0,$t0,
[all...]
/kernel/linux/linux-5.10/arch/mips/lib/
H A Dcsum_partial.S25 #undef t0
29 #define t0 $8 define
121 lbu t0, (src)
124 sll t0, t0, 8
126 ADDC(sum, t0)
134 lhu t0, (src)
136 ADDC(sum, t0)
148 LOAD32 t0, 0x00(src)
150 ADDC(sum, t0)
[all...]
/kernel/linux/linux-6.6/arch/mips/lib/
H A Dcsum_partial.S25 #undef t0
29 #define t0 $8 define
121 lbu t0, (src)
124 sll t0, t0, 8
126 ADDC(sum, t0)
134 lhu t0, (src)
136 ADDC(sum, t0)
148 LOAD32 t0, 0x00(src)
150 ADDC(sum, t0)
[all...]
/kernel/linux/linux-5.10/arch/mips/include/asm/mach-malta/
H A Dkernel-entry-init.h35 * The following code uses the t0, t1, t2 and ra registers without
52 li t0, ((MIPS_SEGCFG_MK << MIPS_SEGCFG_AM_SHIFT) | \ variable
58 or t0, t2 variable
59 mtc0 t0, CP0_SEGCTL0 variable
62 li t0, ((MIPS_SEGCFG_MUSUK << MIPS_SEGCFG_AM_SHIFT) | \ variable
69 ins t0, t1, 16, 3 variable
70 mtc0 t0, CP0_SEGCTL1 variable
73 li t0, ((MIPS_SEGCFG_MUSUK << MIPS_SEGCFG_AM_SHIFT) | \ variable
79 or t0, t2 variable
80 mtc0 t0, CP0_SEGCTL variable
83 mfc0 t0, $16, 5 global() variable
85 or t0, t0, t2 global() variable
86 mtc0 t0, $16, 5 global() variable
101 mfc0 t0, CP0_CONFIG, 1 global() variable
102 bgez t0, 9f global() variable
103 mfc0 t0, CP0_CONFIG, 2 global() variable
104 bgez t0, 9f global() variable
105 mfc0 t0, CP0_CONFIG, 3 global() variable
106 sll t0, t0, 6 /* SC bit */ global() variable
107 bgez t0, 9f global() variable
[all...]
/kernel/linux/linux-6.6/arch/mips/include/asm/mach-malta/
H A Dkernel-entry-init.h35 * The following code uses the t0, t1, t2 and ra registers without
52 li t0, ((MIPS_SEGCFG_MK << MIPS_SEGCFG_AM_SHIFT) | \ variable
58 or t0, t2 variable
59 mtc0 t0, CP0_SEGCTL0 variable
62 li t0, ((MIPS_SEGCFG_MUSUK << MIPS_SEGCFG_AM_SHIFT) | \ variable
69 ins t0, t1, 16, 3 variable
70 mtc0 t0, CP0_SEGCTL1 variable
73 li t0, ((MIPS_SEGCFG_MUSUK << MIPS_SEGCFG_AM_SHIFT) | \ variable
79 or t0, t2 variable
80 mtc0 t0, CP0_SEGCTL variable
83 mfc0 t0, $16, 5 global() variable
85 or t0, t0, t2 global() variable
86 mtc0 t0, $16, 5 global() variable
101 mfc0 t0, CP0_CONFIG, 1 global() variable
102 bgez t0, 9f global() variable
103 mfc0 t0, CP0_CONFIG, 2 global() variable
104 bgez t0, 9f global() variable
105 mfc0 t0, CP0_CONFIG, 3 global() variable
106 sll t0, t0, 6 /* SC bit */ global() variable
107 bgez t0, 9f global() variable
[all...]

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