stride_reg (reference) in projects: kernel - OpenGrok search results

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Searched refs:stride_reg (Results 1 - 4 of 4) sorted by relevance

/kernel/linux/linux-5.10/drivers/gpu/drm/i915/gvt/
H A D	fb_decoder.c	`151 u32 stride_reg = vgpu_vreg_t(vgpu, DSPSTRIDE(pipe)) & stride_mask; in intel_vgpu_get_stride() local 152 u32 stride = stride_reg; in intel_vgpu_get_stride() 157 stride = stride_reg * 64; in intel_vgpu_get_stride() 160 stride = stride_reg * 512; in intel_vgpu_get_stride() 163 stride = stride_reg * 128; in intel_vgpu_get_stride() 167 stride = stride_reg * 64; in intel_vgpu_get_stride() 169 stride = stride_reg * 128; in intel_vgpu_get_stride()`
H A D	cmd_parser.c	1232 i915_reg_t stride_reg; member 1280 info->stride_reg = DSPSTRIDE(info->pipe); in gen8_decode_mi_display_flip() 1284 info->stride_reg = SPRSTRIDE(info->pipe); in gen8_decode_mi_display_flip() 1346 info->stride_reg = DSPSTRIDE(info->pipe); in skl_decode_mi_display_flip() 1361 stride = vgpu_vreg_t(s->vgpu, info->stride_reg) & GENMASK(9, 0); in gen8_check_mi_display_flip() 1365 stride = (vgpu_vreg_t(s->vgpu, info->stride_reg) & in gen8_check_mi_display_flip() 1389 set_mask_bits(&vgpu_vreg_t(vgpu, info->stride_reg), GENMASK(9, 0), in gen8_update_plane_mmio_from_mi_display_flip() 1394 set_mask_bits(&vgpu_vreg_t(vgpu, info->stride_reg), GENMASK(15, 6), in gen8_update_plane_mmio_from_mi_display_flip()
/kernel/linux/linux-6.6/drivers/gpu/drm/i915/gvt/
H A D	fb_decoder.c	`152 u32 stride_reg = vgpu_vreg_t(vgpu, DSPSTRIDE(pipe)) & stride_mask; in intel_vgpu_get_stride() local 153 u32 stride = stride_reg; in intel_vgpu_get_stride() 158 stride = stride_reg * 64; in intel_vgpu_get_stride() 161 stride = stride_reg * 512; in intel_vgpu_get_stride() 164 stride = stride_reg * 128; in intel_vgpu_get_stride() 168 stride = stride_reg * 64; in intel_vgpu_get_stride() 170 stride = stride_reg * 128; in intel_vgpu_get_stride()`
H A D	cmd_parser.c	1269 i915_reg_t stride_reg; member 1317 info->stride_reg = DSPSTRIDE(info->pipe); in gen8_decode_mi_display_flip() 1321 info->stride_reg = SPRSTRIDE(info->pipe); in gen8_decode_mi_display_flip() 1383 info->stride_reg = DSPSTRIDE(info->pipe); in skl_decode_mi_display_flip() 1398 stride = vgpu_vreg_t(s->vgpu, info->stride_reg) & GENMASK(9, 0); in gen8_check_mi_display_flip() 1402 stride = (vgpu_vreg_t(s->vgpu, info->stride_reg) & in gen8_check_mi_display_flip() 1426 set_mask_bits(&vgpu_vreg_t(vgpu, info->stride_reg), GENMASK(9, 0), in gen8_update_plane_mmio_from_mi_display_flip() 1431 set_mask_bits(&vgpu_vreg_t(vgpu, info->stride_reg), GENMASK(15, 6), in gen8_update_plane_mmio_from_mi_display_flip()

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