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Searched refs:stream_res (Results 1 - 25 of 77) sorted by relevance

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/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/dce110/
H A Ddce110_hw_sequencer.c636 if (pipe_ctx->stream_res.stream_enc == NULL) in dce110_update_info_frame()
646 pipe_ctx->stream_res.stream_enc->funcs->update_hdmi_info_packets( in dce110_update_info_frame()
647 pipe_ctx->stream_res.stream_enc, in dce110_update_info_frame()
648 &pipe_ctx->stream_res.encoder_info_frame); in dce110_update_info_frame()
650 pipe_ctx->stream_res.stream_enc->funcs->update_dp_info_packets( in dce110_update_info_frame()
651 pipe_ctx->stream_res.stream_enc, in dce110_update_info_frame()
652 &pipe_ctx->stream_res.encoder_info_frame); in dce110_update_info_frame()
665 struct timing_generator *tg = pipe_ctx->stream_res.tg; in dce110_enable_stream()
672 pipe_ctx->stream_res.stream_enc->id, true); in dce110_enable_stream()
691 if (pipe_ctx->stream_res in dce110_enable_stream()
[all...]
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dcn314/
H A Ddcn314_hwseq.c97 struct display_stream_compressor *dsc = pipe_ctx->stream_res.dsc; in update_dsc_on_stream()
122 dsc->funcs->dsc_enable(dsc, pipe_ctx->stream_res.opp->inst); in update_dsc_on_stream()
124 struct display_stream_compressor *odm_dsc = odm_pipe->stream_res.dsc; in update_dsc_on_stream()
128 odm_dsc->funcs->dsc_enable(odm_dsc, odm_pipe->stream_res.opp->inst); in update_dsc_on_stream()
136 DC_LOG_DSC("Setting optc DSC config for tg instance %d:", pipe_ctx->stream_res.tg->inst); in update_dsc_on_stream()
137 pipe_ctx->stream_res.tg->funcs->set_dsc_config(pipe_ctx->stream_res.tg, in update_dsc_on_stream()
143 pipe_ctx->stream_res.tg->funcs->set_dsc_config( in update_dsc_on_stream()
144 pipe_ctx->stream_res.tg, in update_dsc_on_stream()
148 dsc->funcs->dsc_disable(pipe_ctx->stream_res in update_dsc_on_stream()
[all...]
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/core/
H A Ddc_link_hwss.c123 pipes[i].stream_res.pix_clk_params.requested_pix_clk_100hz = in dp_enable_link_phy()
127 &pipes[i].stream_res.pix_clk_params, in dp_enable_link_phy()
338 pipes[i].stream_res.stream_enc != NULL && in dp_retrain_link_dp_test()
342 pipes[i].stream_res.stream_enc->funcs->dp_blank( in dp_retrain_link_dp_test()
343 pipes[i].stream_res.stream_enc); in dp_retrain_link_dp_test()
352 if ((&pipes[i])->stream_res.audio && !link->dc->debug.az_endpoint_mute_only) in dp_retrain_link_dp_test()
353 (&pipes[i])->stream_res.audio->funcs->az_disable((&pipes[i])->stream_res.audio); in dp_retrain_link_dp_test()
375 if (pipes[i].stream_res.audio) { in dp_retrain_link_dp_test()
378 pipes[i].stream_res in dp_retrain_link_dp_test()
[all...]
H A Ddc_resource.c1402 split_pipe->stream_res.tg = pool->timing_generators[i]; in acquire_first_split_pipe()
1406 split_pipe->stream_res.opp = pool->opps[i]; in acquire_first_split_pipe()
1476 free_pipe->stream_res.tg = tail_pipe->stream_res.tg; in dc_add_plane_to_context()
1477 free_pipe->stream_res.abm = tail_pipe->stream_res.abm; in dc_add_plane_to_context()
1478 free_pipe->stream_res.opp = tail_pipe->stream_res.opp; in dc_add_plane_to_context()
1479 free_pipe->stream_res.stream_enc = tail_pipe->stream_res in dc_add_plane_to_context()
[all...]
H A Ddc.c296 if (pipe->stream == stream && pipe->stream_res.tg) { in dc_stream_adjust_vmin_vmax()
324 if (pipe->stream == stream && pipe->stream_res.stream_enc) { in dc_stream_get_crtc_position()
381 tg = pipe->stream_res.tg; in dc_stream_configure_crc()
415 tg = pipe->stream_res.tg; in dc_stream_get_crc()
434 pipe_ctx->stream_res.opp->dyn_expansion = option; in dc_stream_set_dyn_expansion()
435 pipe_ctx->stream_res.opp->funcs->opp_set_dyn_expansion( in dc_stream_set_dyn_expansion()
436 pipe_ctx->stream_res.opp, in dc_stream_set_dyn_expansion()
479 pipes->stream_res.opp->funcs-> in dc_stream_set_dither_option()
480 opp_program_bit_depth_reduction(pipes->stream_res.opp, &params); in dc_stream_set_dither_option()
515 pipes->stream_res in dc_stream_program_csc_matrix()
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/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/link/hwss/
H A Dlink_hwss_dio.c32 struct stream_encoder *stream_encoder = pipe_ctx->stream_res.stream_enc; in set_dio_throttled_vcp_size()
42 struct stream_encoder *stream_enc = pipe_ctx->stream_res.stream_enc; in setup_dio_stream_encoder()
45 pipe_ctx->stream_res.stream_enc->id, true); in setup_dio_stream_encoder()
59 struct stream_encoder *stream_enc = pipe_ctx->stream_res.stream_enc; in reset_dio_stream_encoder()
66 pipe_ctx->stream_res.stream_enc->id, in reset_dio_stream_encoder()
77 struct stream_encoder *stream_encoder = pipe_ctx->stream_res.stream_enc; in setup_dio_stream_attribute()
84 pipe_ctx->stream_res.tg->inst, in setup_dio_stream_attribute()
99 pipe_ctx->stream_res.audio != NULL); in setup_dio_stream_attribute()
183 pipe_ctx->stream_res.stream_enc->funcs->dp_audio_setup( in setup_dio_audio_output()
184 pipe_ctx->stream_res in setup_dio_audio_output()
[all...]
H A Dlink_hwss_hpo_dp.c35 pipe_ctx->stream_res.hpo_dp_stream_enc; in set_hpo_dp_throttled_vcp_size()
49 pipe_ctx->stream_res.hpo_dp_stream_enc; in set_hpo_dp_hblank_min_symbol_width()
74 struct hpo_dp_stream_encoder *stream_enc = pipe_ctx->stream_res.hpo_dp_stream_enc; in setup_hpo_dp_stream_encoder()
83 struct hpo_dp_stream_encoder *stream_enc = pipe_ctx->stream_res.hpo_dp_stream_enc; in reset_hpo_dp_stream_encoder()
90 struct hpo_dp_stream_encoder *stream_enc = pipe_ctx->stream_res.hpo_dp_stream_enc; in setup_hpo_dp_stream_attribute()
169 pipe_ctx->stream_res.hpo_dp_stream_enc->funcs->dp_audio_setup( in setup_hpo_dp_audio_output()
170 pipe_ctx->stream_res.hpo_dp_stream_enc, in setup_hpo_dp_audio_output()
177 pipe_ctx->stream_res.hpo_dp_stream_enc->funcs->dp_audio_enable( in enable_hpo_dp_audio_packet()
178 pipe_ctx->stream_res.hpo_dp_stream_enc); in enable_hpo_dp_audio_packet()
183 if (pipe_ctx->stream_res in disable_hpo_dp_audio_packet()
[all...]
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/dcn20/
H A Ddcn20_hwseq.c89 * Groups in stream_res are stored as +1 from HW registers, i.e.
90 * gsl_0 <=> pipe_ctx->stream_res.gsl_group == 1
107 if (pipe_ctx->stream_res.gsl_group > 0) in dcn20_setup_gsl_group_as_lock()
112 pipe_ctx->stream_res.gsl_group = group_idx; in dcn20_setup_gsl_group_as_lock()
134 group_idx = pipe_ctx->stream_res.gsl_group; in dcn20_setup_gsl_group_as_lock()
138 pipe_ctx->stream_res.gsl_group = 0; in dcn20_setup_gsl_group_as_lock()
162 if (pipe_ctx->stream_res.tg->funcs->set_gsl != NULL && in dcn20_setup_gsl_group_as_lock()
163 pipe_ctx->stream_res.tg->funcs->set_gsl_source_select != NULL) { in dcn20_setup_gsl_group_as_lock()
164 pipe_ctx->stream_res.tg->funcs->set_gsl( in dcn20_setup_gsl_group_as_lock()
165 pipe_ctx->stream_res in dcn20_setup_gsl_group_as_lock()
1000 struct stream_resource *stream_res = &pipe_ctx->stream_res; dcn20_blank_pixel_data() local
[all...]
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dcn31/
H A Ddcn31_hwseq.c381 if (pipe_ctx->stream_res.stream_enc == NULL) in dcn31_update_info_frame()
391 pipe_ctx->stream_res.stream_enc->funcs->update_hdmi_info_packets( in dcn31_update_info_frame()
392 pipe_ctx->stream_res.stream_enc, in dcn31_update_info_frame()
393 &pipe_ctx->stream_res.encoder_info_frame); in dcn31_update_info_frame()
395 pipe_ctx->stream_res.hpo_dp_stream_enc->funcs->update_dp_info_packets( in dcn31_update_info_frame()
396 pipe_ctx->stream_res.hpo_dp_stream_enc, in dcn31_update_info_frame()
397 &pipe_ctx->stream_res.encoder_info_frame); in dcn31_update_info_frame()
400 if (pipe_ctx->stream_res.stream_enc->funcs->update_dp_info_packets_sdp_line_num) in dcn31_update_info_frame()
401 pipe_ctx->stream_res.stream_enc->funcs->update_dp_info_packets_sdp_line_num( in dcn31_update_info_frame()
402 pipe_ctx->stream_res in dcn31_update_info_frame()
[all...]
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dcn20/
H A Ddcn20_hwseq.c93 * Groups in stream_res are stored as +1 from HW registers, i.e.
94 * gsl_0 <=> pipe_ctx->stream_res.gsl_group == 1
111 if (pipe_ctx->stream_res.gsl_group > 0) in dcn20_setup_gsl_group_as_lock()
116 pipe_ctx->stream_res.gsl_group = group_idx; in dcn20_setup_gsl_group_as_lock()
138 group_idx = pipe_ctx->stream_res.gsl_group; in dcn20_setup_gsl_group_as_lock()
142 pipe_ctx->stream_res.gsl_group = 0; in dcn20_setup_gsl_group_as_lock()
166 if (pipe_ctx->stream_res.tg->funcs->set_gsl != NULL && in dcn20_setup_gsl_group_as_lock()
167 pipe_ctx->stream_res.tg->funcs->set_gsl_source_select != NULL) { in dcn20_setup_gsl_group_as_lock()
168 pipe_ctx->stream_res.tg->funcs->set_gsl( in dcn20_setup_gsl_group_as_lock()
169 pipe_ctx->stream_res in dcn20_setup_gsl_group_as_lock()
1050 struct stream_resource *stream_res = &pipe_ctx->stream_res; dcn20_blank_pixel_data() local
[all...]
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dce110/
H A Ddce110_hw_sequencer.c638 if (pipe_ctx->stream_res.stream_enc == NULL) in dce110_update_info_frame()
648 pipe_ctx->stream_res.stream_enc->funcs->update_hdmi_info_packets( in dce110_update_info_frame()
649 pipe_ctx->stream_res.stream_enc, in dce110_update_info_frame()
650 &pipe_ctx->stream_res.encoder_info_frame); in dce110_update_info_frame()
652 if (pipe_ctx->stream_res.stream_enc->funcs->update_dp_info_packets_sdp_line_num) in dce110_update_info_frame()
653 pipe_ctx->stream_res.stream_enc->funcs->update_dp_info_packets_sdp_line_num( in dce110_update_info_frame()
654 pipe_ctx->stream_res.stream_enc, in dce110_update_info_frame()
655 &pipe_ctx->stream_res.encoder_info_frame); in dce110_update_info_frame()
657 pipe_ctx->stream_res.stream_enc->funcs->update_dp_info_packets( in dce110_update_info_frame()
658 pipe_ctx->stream_res in dce110_update_info_frame()
[all...]
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/dcn10/
H A Ddcn10_hw_sequencer.c96 tg = pipe_ctx->stream_res.tg; in dcn10_lock_all_pipes()
468 struct timing_generator *tg = pipe_ctx->stream_res.tg; in dcn10_did_underflow_occur()
803 pipe_ctx->stream_res.tg->funcs->enable_optc_clock(pipe_ctx->stream_res.tg, true); in dcn10_enable_stream_timing()
807 &pipe_ctx->stream_res.pix_clk_params, in dcn10_enable_stream_timing()
813 pipe_ctx->stream_res.tg->funcs->program_timing( in dcn10_enable_stream_timing()
814 pipe_ctx->stream_res.tg, in dcn10_enable_stream_timing()
827 inst_offset = reg_offsets[pipe_ctx->stream_res.tg->inst].fmt; in dcn10_enable_stream_timing()
829 pipe_ctx->stream_res.opp->funcs->opp_program_fmt( in dcn10_enable_stream_timing()
830 pipe_ctx->stream_res in dcn10_enable_stream_timing()
2637 struct stream_resource *stream_res = &pipe_ctx->stream_res; dcn10_blank_pixel_data() local
[all...]
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/link/accessories/
H A Dlink_dp_cts.c430 struct output_pixel_processor *opp = pipe_ctx->stream_res.opp; in set_crtc_test_pattern()
485 if (pipe_ctx->stream_res.tg->funcs->set_test_pattern) { in set_crtc_test_pattern()
487 pipe_ctx->stream_res.tg->funcs->set_test_pattern(pipe_ctx->stream_res.tg, in set_crtc_test_pattern()
513 odm_opp = odm_pipe->stream_res.opp; in set_crtc_test_pattern()
527 odm_opp = odm_pipe->stream_res.opp; in set_crtc_test_pattern()
546 if (pipe_ctx->stream_res.tg->funcs->set_test_pattern) { in set_crtc_test_pattern()
548 pipe_ctx->stream_res.tg->funcs->set_test_pattern(pipe_ctx->stream_res.tg, in set_crtc_test_pattern()
556 odm_opp = odm_pipe->stream_res in set_crtc_test_pattern()
[all...]
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dcn10/
H A Ddcn10_hw_sequencer.c105 tg = pipe_ctx->stream_res.tg; in dcn10_lock_all_pipes()
539 struct timing_generator *tg = pipe_ctx->stream_res.tg; in dcn10_did_underflow_occur()
922 pipe_ctx->stream_res.tg->funcs->enable_optc_clock(pipe_ctx->stream_res.tg, true); in dcn10_enable_stream_timing()
926 &pipe_ctx->stream_res.pix_clk_params, in dcn10_enable_stream_timing()
941 pipe_ctx->stream_res.tg->funcs->program_timing( in dcn10_enable_stream_timing()
942 pipe_ctx->stream_res.tg, in dcn10_enable_stream_timing()
955 inst_offset = reg_offsets[pipe_ctx->stream_res.tg->inst].fmt; in dcn10_enable_stream_timing()
957 pipe_ctx->stream_res.opp->funcs->opp_program_fmt( in dcn10_enable_stream_timing()
958 pipe_ctx->stream_res in dcn10_enable_stream_timing()
2860 struct stream_resource *stream_res = &pipe_ctx->stream_res; dcn10_blank_pixel_data() local
[all...]
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/dce/
H A Ddce_hwseq.c56 if (lock && pipe->stream_res.tg->funcs->is_blanked && in dce_pipe_control_lock()
57 pipe->stream_res.tg->funcs->is_blanked(pipe->stream_res.tg)) in dce_pipe_control_lock()
60 val = REG_GET_4(BLND_V_UPDATE_LOCK[pipe->stream_res.tg->inst], in dce_pipe_control_lock()
71 REG_SET_2(BLND_V_UPDATE_LOCK[pipe->stream_res.tg->inst], val, in dce_pipe_control_lock()
76 REG_SET_2(BLND_V_UPDATE_LOCK[pipe->stream_res.tg->inst], val, in dce_pipe_control_lock()
82 uint32_t value = REG_READ(CRTC_H_BLANK_START_END[pipe->stream_res.tg->inst]); in dce_pipe_control_lock()
83 REG_WRITE(CRTC_H_BLANK_START_END[pipe->stream_res.tg->inst], value); in dce_pipe_control_lock()
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dce/
H A Ddce_hwseq.c56 if (lock && pipe->stream_res.tg->funcs->is_blanked && in dce_pipe_control_lock()
57 pipe->stream_res.tg->funcs->is_blanked(pipe->stream_res.tg)) in dce_pipe_control_lock()
60 val = REG_GET_4(BLND_V_UPDATE_LOCK[pipe->stream_res.tg->inst], in dce_pipe_control_lock()
71 REG_SET_2(BLND_V_UPDATE_LOCK[pipe->stream_res.tg->inst], val, in dce_pipe_control_lock()
76 REG_SET_2(BLND_V_UPDATE_LOCK[pipe->stream_res.tg->inst], val, in dce_pipe_control_lock()
82 uint32_t value = REG_READ(CRTC_H_BLANK_START_END[pipe->stream_res.tg->inst]); in dce_pipe_control_lock()
83 REG_WRITE(CRTC_H_BLANK_START_END[pipe->stream_res.tg->inst], value); in dce_pipe_control_lock()
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dcn32/
H A Ddcn32_hwseq.c402 pipe->stream_res.tg->funcs->wait_for_state(pipe->stream_res.tg, CRTC_STATE_VBLANK); in dcn32_subvp_pipe_control_lock()
444 struct mpc *mpc = pipe_ctx->stream_res.opp->ctx->dc->res_pool->mpc; in dcn32_set_mpc_shaper_3dlut()
480 struct mpc *mpc = pipe_ctx->stream_res.opp->ctx->dc->res_pool->mpc; in dcn32_set_mcm_luts()
554 if (pipe_ctx->stream_res.opp && in dcn32_set_input_transfer_func()
555 pipe_ctx->stream_res.opp->ctx && in dcn32_set_input_transfer_func()
567 struct mpc *mpc = pipe_ctx->stream_res.opp->ctx->dc->res_pool->mpc; in dcn32_set_output_transfer_func()
1002 struct display_stream_compressor *dsc = pipe_ctx->stream_res.dsc; in update_dsc_on_stream()
1027 dsc->funcs->dsc_enable(dsc, pipe_ctx->stream_res.opp->inst); in update_dsc_on_stream()
1029 struct display_stream_compressor *odm_dsc = odm_pipe->stream_res in update_dsc_on_stream()
[all...]
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/link/
H A Dlink_dpms.c666 config.otg_inst = (uint8_t) pipe_ctx->stream_res.tg->inst; in update_psp_stream_config()
669 config.dig_fe = (uint8_t) pipe_ctx->stream_res.stream_enc->stream_enc_inst; in update_psp_stream_config()
672 config.stream_enc_idx = pipe_ctx->stream_res.stream_enc->id - ENGINE_ID_DIGA; in update_psp_stream_config()
675 pipe_ctx->stream_res.hpo_dp_stream_enc->id - ENGINE_ID_HPO_DP_0; in update_psp_stream_config()
777 struct display_stream_compressor *dsc = pipe_ctx->stream_res.dsc; in link_set_dsc_on_stream()
802 dsc->funcs->dsc_enable(dsc, pipe_ctx->stream_res.opp->inst); in link_set_dsc_on_stream()
804 struct display_stream_compressor *odm_dsc = odm_pipe->stream_res.dsc; in link_set_dsc_on_stream()
807 odm_dsc->funcs->dsc_enable(odm_dsc, odm_pipe->stream_res.opp->inst); in link_set_dsc_on_stream()
816 DC_LOG_DSC("Setting stream encoder DSC config for engine %d:", (int)pipe_ctx->stream_res.stream_enc->id); in link_set_dsc_on_stream()
818 pipe_ctx->stream_res in link_set_dsc_on_stream()
[all...]
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dcn201/
H A Ddcn201_hwseq.c307 pipe_ctx->stream_res.tg = tg; in dcn201_init_hw()
316 pipe_ctx->stream_res.opp = NULL; in dcn201_init_hw()
321 pipe_ctx->stream_res.opp = res_pool->opps[i]; in dcn201_init_hw()
342 pipe_ctx->stream_res.tg = NULL; in dcn201_init_hw()
380 struct output_pixel_processor *opp = pipe_ctx->stream_res.opp; in dcn201_plane_atomic_disconnect()
427 struct mpc_tree *mpc_tree_params = &(pipe_ctx->stream_res.opp->mpc_tree_params); in dcn201_update_mpcc()
517 hubp->opp_id = pipe_ctx->stream_res.opp->inst; in dcn201_update_mpcc()
538 pipe->stream_res.tg->funcs->triplebuffer_lock(pipe->stream_res.tg); in dcn201_pipe_control_lock()
540 pipe->stream_res in dcn201_pipe_control_lock()
[all...]
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/dcn21/
H A Ddcn21_hwseq.c163 struct abm *abm = pipe_ctx->stream_res.abm; in dcn21_set_abm_immediate_disable()
164 uint32_t otg_inst = pipe_ctx->stream_res.tg->inst; in dcn21_set_abm_immediate_disable()
181 struct abm *abm = pipe_ctx->stream_res.abm; in dcn21_set_pipe()
182 uint32_t otg_inst = pipe_ctx->stream_res.tg->inst; in dcn21_set_pipe()
201 struct abm *abm = pipe_ctx->stream_res.abm; in dcn21_set_backlight_level()
202 uint32_t otg_inst = pipe_ctx->stream_res.tg->inst; in dcn21_set_backlight_level()
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dcn30/
H A Ddcn30_hwseq.c98 struct mpc *mpc = pipe_ctx->stream_res.opp->ctx->dc->res_pool->mpc; in dcn30_set_mpc_shaper_3dlut()
178 if (pipe_ctx->stream_res.opp && pipe_ctx->stream_res.opp->ctx) { in dcn30_set_input_transfer_func()
194 struct mpc *mpc = pipe_ctx->stream_res.opp->ctx->dc->res_pool->mpc; in dcn30_set_output_transfer_func()
622 if (dc_is_hdmi_signal(pipe_ctx->stream->signal) && pipe_ctx->stream_res.stream_enc != NULL) in dcn30_set_avmute()
623 pipe_ctx->stream_res.stream_enc->funcs->set_avmute( in dcn30_set_avmute()
624 pipe_ctx->stream_res.stream_enc, in dcn30_set_avmute()
635 if (pipe_ctx->stream_res.stream_enc == NULL) in dcn30_update_info_frame()
645 pipe_ctx->stream_res.stream_enc->funcs->update_hdmi_info_packets( in dcn30_update_info_frame()
646 pipe_ctx->stream_res in dcn30_update_info_frame()
[all...]
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/core/
H A Ddc_resource.c1816 split_pipe->stream_res.tg = pool->timing_generators[i]; in acquire_first_split_pipe()
1820 split_pipe->stream_res.opp = pool->opps[i]; in acquire_first_split_pipe()
2337 pipe_ctx->stream_res.tg = pool->timing_generators[i]; in acquire_first_free_pipe()
2343 pipe_ctx->stream_res.opp = pool->opps[i]; in acquire_first_free_pipe()
2351 pipe_ctx->stream_res.tg = pool->timing_generators[tg_inst]; in acquire_first_free_pipe()
2352 pipe_ctx->stream_res.opp = pool->opps[tg_inst]; in acquire_first_free_pipe()
2460 ASSERT(del_pipe->stream_res.stream_enc); in dc_remove_stream_from_ctx()
2464 del_pipe->stream_res.stream_enc, in dc_remove_stream_from_ctx()
2470 del_pipe->stream_res.hpo_dp_stream_enc, in dc_remove_stream_from_ctx()
2475 if (del_pipe->stream_res in dc_remove_stream_from_ctx()
[all...]
H A Ddc.c419 if (pipe->stream == stream && pipe->stream_res.tg) { in dc_stream_adjust_vmin_vmax()
454 if (pipe->stream == stream && pipe->stream_res.tg) { in dc_stream_get_last_used_drr_vtotal()
458 if (pipe->stream_res.tg->funcs->get_last_used_drr_vtotal) { in dc_stream_get_last_used_drr_vtotal()
459 pipe->stream_res.tg->funcs->get_last_used_drr_vtotal(pipe->stream_res.tg, refresh_rate); in dc_stream_get_last_used_drr_vtotal()
485 if (pipe->stream == stream && pipe->stream_res.stream_enc) { in dc_stream_get_crtc_position()
553 mux_mapping.otg_output_num = pipe->stream_res.tg->inst; in dc_stream_forward_crc_window()
629 tg = pipe->stream_res.tg; in dc_stream_configure_crc()
668 tg = pipe->stream_res.tg; in dc_stream_get_crc()
687 pipe_ctx->stream_res in dc_stream_set_dyn_expansion()
[all...]
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/dcn30/
H A Ddcn30_hwseq.c95 struct mpc *mpc = pipe_ctx->stream_res.opp->ctx->dc->res_pool->mpc; in dcn30_set_mpc_shaper_3dlut()
174 if (pipe_ctx->stream_res.opp && pipe_ctx->stream_res.opp->ctx) { in dcn30_set_input_transfer_func()
190 struct mpc *mpc = pipe_ctx->stream_res.opp->ctx->dc->res_pool->mpc; in dcn30_set_output_transfer_func()
644 if (dc_is_hdmi_tmds_signal(pipe_ctx->stream->signal) && pipe_ctx->stream_res.stream_enc != NULL) in dcn30_set_avmute()
645 pipe_ctx->stream_res.stream_enc->funcs->set_avmute( in dcn30_set_avmute()
646 pipe_ctx->stream_res.stream_enc, in dcn30_set_avmute()
657 if (pipe_ctx->stream_res.stream_enc == NULL) in dcn30_update_info_frame()
667 pipe_ctx->stream_res.stream_enc->funcs->update_hdmi_info_packets( in dcn30_update_info_frame()
668 pipe_ctx->stream_res in dcn30_update_info_frame()
[all...]
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dcn21/
H A Ddcn21_hwseq.c181 struct abm *abm = pipe_ctx->stream_res.abm; in dcn21_set_abm_immediate_disable()
182 uint32_t otg_inst = pipe_ctx->stream_res.tg->inst; in dcn21_set_abm_immediate_disable()
208 struct abm *abm = pipe_ctx->stream_res.abm; in dcn21_set_pipe()
209 struct timing_generator *tg = pipe_ctx->stream_res.tg; in dcn21_set_pipe()
243 struct abm *abm = pipe_ctx->stream_res.abm; in dcn21_set_backlight_level()
244 struct timing_generator *tg = pipe_ctx->stream_res.tg; in dcn21_set_backlight_level()

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