Searched refs:set_reg_bits (Results 1 - 3 of 3) sorted by relevance
/kernel/linux/linux-5.10/drivers/media/tuners/ |
H A D | mxl5007t.c | 163 static void set_reg_bits(struct reg_pair_t *reg_pair, u8 reg, u8 mask, u8 val) in set_reg_bits() function 207 set_reg_bits(state->tab_init, 0x06, 0x1f, 0x12); in mxl5007t_set_mode_bits() 210 set_reg_bits(state->tab_init, 0x06, 0x1f, 0x11); in mxl5007t_set_mode_bits() 213 set_reg_bits(state->tab_init, 0x06, 0x1f, 0x10); in mxl5007t_set_mode_bits() 216 set_reg_bits(state->tab_init_cable, 0x09, 0xff, 0xc1); in mxl5007t_set_mode_bits() 217 set_reg_bits(state->tab_init_cable, 0x0a, 0xff, in mxl5007t_set_mode_bits() 219 set_reg_bits(state->tab_init_cable, 0x0b, 0xff, 0x17); in mxl5007t_set_mode_bits() 271 set_reg_bits(state->tab_init, 0x02, 0x0f, val); in mxl5007t_set_if_freq_bits() 274 set_reg_bits(state->tab_init, 0x02, 0x10, invert_if ? 0x10 : 0x00); in mxl5007t_set_if_freq_bits() 287 set_reg_bits(stat in mxl5007t_set_xtal_freq_bits() [all...] |
/kernel/linux/linux-6.6/drivers/media/tuners/ |
H A D | mxl5007t.c | 163 static void set_reg_bits(struct reg_pair_t *reg_pair, u8 reg, u8 mask, u8 val) in set_reg_bits() function 205 set_reg_bits(state->tab_init, 0x06, 0x1f, 0x12); in mxl5007t_set_mode_bits() 208 set_reg_bits(state->tab_init, 0x06, 0x1f, 0x11); in mxl5007t_set_mode_bits() 211 set_reg_bits(state->tab_init, 0x06, 0x1f, 0x10); in mxl5007t_set_mode_bits() 214 set_reg_bits(state->tab_init_cable, 0x09, 0xff, 0xc1); in mxl5007t_set_mode_bits() 215 set_reg_bits(state->tab_init_cable, 0x0a, 0xff, in mxl5007t_set_mode_bits() 217 set_reg_bits(state->tab_init_cable, 0x0b, 0xff, 0x17); in mxl5007t_set_mode_bits() 268 set_reg_bits(state->tab_init, 0x02, 0x0f, val); in mxl5007t_set_if_freq_bits() 271 set_reg_bits(state->tab_init, 0x02, 0x10, invert_if ? 0x10 : 0x00); in mxl5007t_set_if_freq_bits() 282 set_reg_bits(stat in mxl5007t_set_xtal_freq_bits() [all...] |
/kernel/linux/linux-5.10/drivers/char/pcmcia/ |
H A D | synclink_cs.c | 327 #define set_reg_bits(info, reg, mask) \ macro 2184 set_reg_bits(info, CHA+DAFO, BIT6); in mgslpc_break() 3225 set_reg_bits(info, CHA + PVR, BIT3); in hdlc_mode() 3279 set_reg_bits(info, CHA + MODE, BIT3); in rx_start() 3539 set_reg_bits(info, CHA + MODE, BIT3); in async_mode() 3544 set_reg_bits(info, CHA + PVR, BIT3); in async_mode() 3561 set_reg_bits(info, CHA + CCR1, BIT3); in tx_set_idle() 3611 set_reg_bits(info, CHA + PVR, PVR_DTR); in set_signals()
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