/kernel/linux/linux-6.6/drivers/gpu/drm/amd/pm/powerplay/hwmgr/ |
H A D | ppatomctrl.c | 49 ATOM_INIT_REG_BLOCK *reg_block, in atomctrl_retrieve_ac_timing() 55 ((uint8_t *)reg_block + (2 * sizeof(uint16_t)) + le16_to_cpu(reg_block->usRegIndexTblSize)); in atomctrl_retrieve_ac_timing() 84 ((uint8_t *)reg_data + le16_to_cpu(reg_block->usRegDataBlkSize)) ; in atomctrl_retrieve_ac_timing() 97 * @reg_block: the address ATOM_INIT_REG_BLOCK 102 ATOM_INIT_REG_BLOCK *reg_block, in atomctrl_set_mc_reg_address_table() 106 uint8_t num_entries = (uint8_t)((le16_to_cpu(reg_block->usRegIndexTblSize)) in atomctrl_set_mc_reg_address_table() 108 ATOM_INIT_REG_INDEX_FORMAT *format = ®_block->asRegIndexBuf[0]; in atomctrl_set_mc_reg_address_table() 138 ATOM_INIT_REG_BLOCK *reg_block; in atomctrl_initialize_mc_reg_table() local 156 reg_block in atomctrl_initialize_mc_reg_table() 47 atomctrl_retrieve_ac_timing( uint8_t index, ATOM_INIT_REG_BLOCK *reg_block, pp_atomctrl_mc_reg_table *table) atomctrl_retrieve_ac_timing() argument 101 atomctrl_set_mc_reg_address_table( ATOM_INIT_REG_BLOCK *reg_block, pp_atomctrl_mc_reg_table *table) atomctrl_set_mc_reg_address_table() argument 175 ATOM_INIT_REG_BLOCK *reg_block; atomctrl_initialize_mc_reg_table_v2_2() local [all...] |
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/amdgpu/ |
H A D | dce_v8_0.c | 2867 u32 reg_block, lb_interrupt_mask; in dce_v8_0_set_crtc_vblank_interrupt_state() local 2876 reg_block = CRTC0_REGISTER_OFFSET; in dce_v8_0_set_crtc_vblank_interrupt_state() 2879 reg_block = CRTC1_REGISTER_OFFSET; in dce_v8_0_set_crtc_vblank_interrupt_state() 2882 reg_block = CRTC2_REGISTER_OFFSET; in dce_v8_0_set_crtc_vblank_interrupt_state() 2885 reg_block = CRTC3_REGISTER_OFFSET; in dce_v8_0_set_crtc_vblank_interrupt_state() 2888 reg_block = CRTC4_REGISTER_OFFSET; in dce_v8_0_set_crtc_vblank_interrupt_state() 2891 reg_block = CRTC5_REGISTER_OFFSET; in dce_v8_0_set_crtc_vblank_interrupt_state() 2900 lb_interrupt_mask = RREG32(mmLB_INTERRUPT_MASK + reg_block); in dce_v8_0_set_crtc_vblank_interrupt_state() 2902 WREG32(mmLB_INTERRUPT_MASK + reg_block, lb_interrupt_mask); in dce_v8_0_set_crtc_vblank_interrupt_state() 2905 lb_interrupt_mask = RREG32(mmLB_INTERRUPT_MASK + reg_block); in dce_v8_0_set_crtc_vblank_interrupt_state() 2918 u32 reg_block, lb_interrupt_mask; dce_v8_0_set_crtc_vline_interrupt_state() local [all...] |
H A D | atom.c | 191 idx += gctx->reg_block; in atom_get_src_int() 258 val = gctx->reg_block; in atom_get_src_int() 463 idx += gctx->reg_block; in atom_put_dst() 525 gctx->reg_block = val; in atom_put_dst() 915 ctx->ctx->reg_block = U16(*ptr); in atom_op_setregblock() 917 SDEBUG(" base: 0x%04X\n", ctx->ctx->reg_block); in atom_op_setregblock() 1273 ctx->reg_block = 0; in amdgpu_atom_execute_table()
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H A D | atom.h | 138 uint16_t reg_block; member
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H A D | dce_v6_0.c | 2821 u32 reg_block, interrupt_mask; in dce_v6_0_set_crtc_vblank_interrupt_state() local 2830 reg_block = SI_CRTC0_REGISTER_OFFSET; in dce_v6_0_set_crtc_vblank_interrupt_state() 2833 reg_block = SI_CRTC1_REGISTER_OFFSET; in dce_v6_0_set_crtc_vblank_interrupt_state() 2836 reg_block = SI_CRTC2_REGISTER_OFFSET; in dce_v6_0_set_crtc_vblank_interrupt_state() 2839 reg_block = SI_CRTC3_REGISTER_OFFSET; in dce_v6_0_set_crtc_vblank_interrupt_state() 2842 reg_block = SI_CRTC4_REGISTER_OFFSET; in dce_v6_0_set_crtc_vblank_interrupt_state() 2845 reg_block = SI_CRTC5_REGISTER_OFFSET; in dce_v6_0_set_crtc_vblank_interrupt_state() 2854 interrupt_mask = RREG32(mmINT_MASK + reg_block); in dce_v6_0_set_crtc_vblank_interrupt_state() 2856 WREG32(mmINT_MASK + reg_block, interrupt_mask); in dce_v6_0_set_crtc_vblank_interrupt_state() 2859 interrupt_mask = RREG32(mmINT_MASK + reg_block); in dce_v6_0_set_crtc_vblank_interrupt_state() [all...] |
H A D | amdgpu_atombios.c | 1591 ATOM_INIT_REG_BLOCK *reg_block = in amdgpu_atombios_init_mc_reg_table() local 1596 ((u8 *)reg_block + (2 * sizeof(u16)) + in amdgpu_atombios_init_mc_reg_table() 1597 le16_to_cpu(reg_block->usRegIndexTblSize)); in amdgpu_atombios_init_mc_reg_table() 1598 ATOM_INIT_REG_INDEX_FORMAT *format = ®_block->asRegIndexBuf[0]; in amdgpu_atombios_init_mc_reg_table() 1599 num_entries = (u8)((le16_to_cpu(reg_block->usRegIndexTblSize)) / in amdgpu_atombios_init_mc_reg_table() 1636 ((u8 *)reg_data + le16_to_cpu(reg_block->usRegDataBlkSize)); in amdgpu_atombios_init_mc_reg_table()
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/kernel/linux/linux-6.6/drivers/gpu/drm/amd/amdgpu/ |
H A D | dce_v8_0.c | 2886 u32 reg_block, lb_interrupt_mask; in dce_v8_0_set_crtc_vblank_interrupt_state() local 2895 reg_block = CRTC0_REGISTER_OFFSET; in dce_v8_0_set_crtc_vblank_interrupt_state() 2898 reg_block = CRTC1_REGISTER_OFFSET; in dce_v8_0_set_crtc_vblank_interrupt_state() 2901 reg_block = CRTC2_REGISTER_OFFSET; in dce_v8_0_set_crtc_vblank_interrupt_state() 2904 reg_block = CRTC3_REGISTER_OFFSET; in dce_v8_0_set_crtc_vblank_interrupt_state() 2907 reg_block = CRTC4_REGISTER_OFFSET; in dce_v8_0_set_crtc_vblank_interrupt_state() 2910 reg_block = CRTC5_REGISTER_OFFSET; in dce_v8_0_set_crtc_vblank_interrupt_state() 2919 lb_interrupt_mask = RREG32(mmLB_INTERRUPT_MASK + reg_block); in dce_v8_0_set_crtc_vblank_interrupt_state() 2921 WREG32(mmLB_INTERRUPT_MASK + reg_block, lb_interrupt_mask); in dce_v8_0_set_crtc_vblank_interrupt_state() 2924 lb_interrupt_mask = RREG32(mmLB_INTERRUPT_MASK + reg_block); in dce_v8_0_set_crtc_vblank_interrupt_state() 2937 u32 reg_block, lb_interrupt_mask; dce_v8_0_set_crtc_vline_interrupt_state() local [all...] |
H A D | atom.h | 142 uint16_t reg_block; member
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H A D | atom.c | 194 idx += gctx->reg_block; in atom_get_src_int() 261 val = gctx->reg_block; in atom_get_src_int() 466 idx += gctx->reg_block; in atom_put_dst() 528 gctx->reg_block = val; in atom_put_dst() 918 ctx->ctx->reg_block = U16(*ptr); in atom_op_setregblock() 920 SDEBUG(" base: 0x%04X\n", ctx->ctx->reg_block); in atom_op_setregblock() 1276 ctx->reg_block = 0; in amdgpu_atom_execute_table()
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H A D | dce_v6_0.c | 2842 u32 reg_block, interrupt_mask; in dce_v6_0_set_crtc_vblank_interrupt_state() local 2851 reg_block = SI_CRTC0_REGISTER_OFFSET; in dce_v6_0_set_crtc_vblank_interrupt_state() 2854 reg_block = SI_CRTC1_REGISTER_OFFSET; in dce_v6_0_set_crtc_vblank_interrupt_state() 2857 reg_block = SI_CRTC2_REGISTER_OFFSET; in dce_v6_0_set_crtc_vblank_interrupt_state() 2860 reg_block = SI_CRTC3_REGISTER_OFFSET; in dce_v6_0_set_crtc_vblank_interrupt_state() 2863 reg_block = SI_CRTC4_REGISTER_OFFSET; in dce_v6_0_set_crtc_vblank_interrupt_state() 2866 reg_block = SI_CRTC5_REGISTER_OFFSET; in dce_v6_0_set_crtc_vblank_interrupt_state() 2875 interrupt_mask = RREG32(mmINT_MASK + reg_block); in dce_v6_0_set_crtc_vblank_interrupt_state() 2877 WREG32(mmINT_MASK + reg_block, interrupt_mask); in dce_v6_0_set_crtc_vblank_interrupt_state() 2880 interrupt_mask = RREG32(mmINT_MASK + reg_block); in dce_v6_0_set_crtc_vblank_interrupt_state() [all...] |
H A D | amdgpu_atombios.c | 1441 ATOM_INIT_REG_BLOCK *reg_block = in amdgpu_atombios_init_mc_reg_table() local 1446 ((u8 *)reg_block + (2 * sizeof(u16)) + in amdgpu_atombios_init_mc_reg_table() 1447 le16_to_cpu(reg_block->usRegIndexTblSize)); in amdgpu_atombios_init_mc_reg_table() 1448 ATOM_INIT_REG_INDEX_FORMAT *format = ®_block->asRegIndexBuf[0]; in amdgpu_atombios_init_mc_reg_table() 1449 num_entries = (u8)((le16_to_cpu(reg_block->usRegIndexTblSize)) / in amdgpu_atombios_init_mc_reg_table() 1486 ((u8 *)reg_data + le16_to_cpu(reg_block->usRegDataBlkSize)); in amdgpu_atombios_init_mc_reg_table()
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/kernel/linux/linux-5.10/drivers/gpu/drm/amd/pm/powerplay/hwmgr/ |
H A D | ppatomctrl.c | 49 ATOM_INIT_REG_BLOCK *reg_block, in atomctrl_retrieve_ac_timing() 55 ((uint8_t *)reg_block + (2 * sizeof(uint16_t)) + le16_to_cpu(reg_block->usRegIndexTblSize)); in atomctrl_retrieve_ac_timing() 84 ((uint8_t *)reg_data + le16_to_cpu(reg_block->usRegDataBlkSize)) ; in atomctrl_retrieve_ac_timing() 97 * @param reg_block the address ATOM_INIT_REG_BLOCK 102 ATOM_INIT_REG_BLOCK *reg_block, in atomctrl_set_mc_reg_address_table() 106 uint8_t num_entries = (uint8_t)((le16_to_cpu(reg_block->usRegIndexTblSize)) in atomctrl_set_mc_reg_address_table() 108 ATOM_INIT_REG_INDEX_FORMAT *format = ®_block->asRegIndexBuf[0]; in atomctrl_set_mc_reg_address_table() 138 ATOM_INIT_REG_BLOCK *reg_block; in atomctrl_initialize_mc_reg_table() local 156 reg_block in atomctrl_initialize_mc_reg_table() 47 atomctrl_retrieve_ac_timing( uint8_t index, ATOM_INIT_REG_BLOCK *reg_block, pp_atomctrl_mc_reg_table *table) atomctrl_retrieve_ac_timing() argument 101 atomctrl_set_mc_reg_address_table( ATOM_INIT_REG_BLOCK *reg_block, pp_atomctrl_mc_reg_table *table) atomctrl_set_mc_reg_address_table() argument [all...] |
/kernel/linux/linux-5.10/drivers/gpu/drm/radeon/ |
H A D | atom.c | 195 idx += gctx->reg_block; in atom_get_src_int() 262 val = gctx->reg_block; in atom_get_src_int() 467 idx += gctx->reg_block; in atom_put_dst() 529 gctx->reg_block = val; in atom_put_dst() 883 ctx->ctx->reg_block = U16(*ptr); in atom_op_setregblock() 885 SDEBUG(" base: 0x%04X\n", ctx->ctx->reg_block); in atom_op_setregblock() 1226 ctx->reg_block = 0; in atom_execute_table_scratch_unlocked()
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H A D | atom.h | 137 uint16_t reg_block; member
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H A D | radeon_atombios.c | 4009 ATOM_INIT_REG_BLOCK *reg_block = in radeon_atom_init_mc_reg_table() local 4014 ((u8 *)reg_block + (2 * sizeof(u16)) + in radeon_atom_init_mc_reg_table() 4015 le16_to_cpu(reg_block->usRegIndexTblSize)); in radeon_atom_init_mc_reg_table() 4016 ATOM_INIT_REG_INDEX_FORMAT *format = ®_block->asRegIndexBuf[0]; in radeon_atom_init_mc_reg_table() 4017 num_entries = (u8)((le16_to_cpu(reg_block->usRegIndexTblSize)) / in radeon_atom_init_mc_reg_table() 4054 ((u8 *)reg_data + le16_to_cpu(reg_block->usRegDataBlkSize)); in radeon_atom_init_mc_reg_table()
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/kernel/linux/linux-6.6/drivers/gpu/drm/radeon/ |
H A D | atom.c | 192 idx += gctx->reg_block; in atom_get_src_int() 259 val = gctx->reg_block; in atom_get_src_int() 464 idx += gctx->reg_block; in atom_put_dst() 526 gctx->reg_block = val; in atom_put_dst() 880 ctx->ctx->reg_block = U16(*ptr); in atom_op_setregblock() 882 SDEBUG(" base: 0x%04X\n", ctx->ctx->reg_block); in atom_op_setregblock() 1223 ctx->reg_block = 0; in atom_execute_table_scratch_unlocked()
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H A D | atom.h | 137 uint16_t reg_block; member
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H A D | radeon_atombios.c | 4004 ATOM_INIT_REG_BLOCK *reg_block = in radeon_atom_init_mc_reg_table() local 4009 ((u8 *)reg_block + (2 * sizeof(u16)) + in radeon_atom_init_mc_reg_table() 4010 le16_to_cpu(reg_block->usRegIndexTblSize)); in radeon_atom_init_mc_reg_table() 4011 ATOM_INIT_REG_INDEX_FORMAT *format = ®_block->asRegIndexBuf[0]; in radeon_atom_init_mc_reg_table() 4012 num_entries = (u8)((le16_to_cpu(reg_block->usRegIndexTblSize)) / in radeon_atom_init_mc_reg_table() 4049 ((u8 *)reg_data + le16_to_cpu(reg_block->usRegDataBlkSize)); in radeon_atom_init_mc_reg_table()
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/kernel/linux/linux-5.10/drivers/net/ethernet/intel/i40e/ |
H A D | i40e_common.c | 1057 u32 reg_block = 0; in i40e_pre_tx_queue_cfg() local 1061 reg_block = abs_queue_idx / 128; in i40e_pre_tx_queue_cfg() 1065 reg_val = rd32(hw, I40E_GLLAN_TXPRE_QDIS(reg_block)); in i40e_pre_tx_queue_cfg() 1074 wr32(hw, I40E_GLLAN_TXPRE_QDIS(reg_block), reg_val); in i40e_pre_tx_queue_cfg() 1377 u32 reg_block = 0; in i40e_clear_hw() local 1380 reg_block = abs_queue_idx / 128; in i40e_clear_hw() 1384 val = rd32(hw, I40E_GLLAN_TXPRE_QDIS(reg_block)); in i40e_clear_hw() 1389 wr32(hw, I40E_GLLAN_TXPRE_QDIS(reg_block), val); in i40e_clear_hw()
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/kernel/linux/linux-6.6/drivers/net/ethernet/intel/i40e/ |
H A D | i40e_common.c | 800 u32 reg_block = 0; in i40e_pre_tx_queue_cfg() local 804 reg_block = abs_queue_idx / 128; in i40e_pre_tx_queue_cfg() 808 reg_val = rd32(hw, I40E_GLLAN_TXPRE_QDIS(reg_block)); in i40e_pre_tx_queue_cfg() 817 wr32(hw, I40E_GLLAN_TXPRE_QDIS(reg_block), reg_val); in i40e_pre_tx_queue_cfg() 1120 u32 reg_block = 0; in i40e_clear_hw() local 1123 reg_block = abs_queue_idx / 128; in i40e_clear_hw() 1127 val = rd32(hw, I40E_GLLAN_TXPRE_QDIS(reg_block)); in i40e_clear_hw() 1132 wr32(hw, I40E_GLLAN_TXPRE_QDIS(reg_block), val); in i40e_clear_hw()
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