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Searched refs:pp_smu (Results 1 - 25 of 57) sorted by relevance

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/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/
H A Ddm_pp_smu.h48 struct pp_smu { struct
97 struct pp_smu pp_smu; member
103 void (*set_display_count)(struct pp_smu *pp, int count);
112 void (*set_wm_ranges)(struct pp_smu *pp,
118 void (*set_hard_min_dcfclk_by_freq)(struct pp_smu *pp, int mhz);
124 void (*set_min_deep_sleep_dcfclk)(struct pp_smu *pp, int mhz);
129 void (*set_hard_min_fclk_by_freq)(struct pp_smu *pp, int mhz);
134 void (*set_hard_min_socclk_by_freq)(struct pp_smu *pp, int mhz);
137 void (*set_pme_wa_enable)(struct pp_smu *p
168 struct pp_smu pp_smu; global() member
269 struct pp_smu pp_smu; global() member
287 struct pp_smu pp_smu; global() member
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/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/
H A Ddm_pp_smu.h48 struct pp_smu { struct
97 struct pp_smu pp_smu; member
103 void (*set_display_count)(struct pp_smu *pp, int count);
112 void (*set_wm_ranges)(struct pp_smu *pp,
118 void (*set_hard_min_dcfclk_by_freq)(struct pp_smu *pp, int mhz);
124 void (*set_min_deep_sleep_dcfclk)(struct pp_smu *pp, int mhz);
129 void (*set_hard_min_fclk_by_freq)(struct pp_smu *pp, int mhz);
134 void (*set_hard_min_socclk_by_freq)(struct pp_smu *pp, int mhz);
137 void (*set_pme_wa_enable)(struct pp_smu *p
168 struct pp_smu pp_smu; global() member
265 struct pp_smu pp_smu; global() member
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/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/
H A Drv1_clk_mgr.c198 struct pp_smu_funcs_rv *pp_smu = NULL; in rv1_update_clocks() local
205 ASSERT(clk_mgr->pp_smu); in rv1_update_clocks()
210 pp_smu = &clk_mgr->pp_smu->rv_funcs; in rv1_update_clocks()
223 if (pp_smu->set_display_count) in rv1_update_clocks()
224 pp_smu->set_display_count(&pp_smu->pp_smu, display_count); in rv1_update_clocks()
264 if (pp_smu->set_hard_min_fclk_by_freq && in rv1_update_clocks()
265 pp_smu in rv1_update_clocks()
297 struct pp_smu_funcs_rv *pp_smu = NULL; rv1_enable_pme_wa() local
319 rv1_clk_mgr_construct(struct dc_context *ctx, struct clk_mgr_internal *clk_mgr, struct pp_smu_funcs *pp_smu) rv1_clk_mgr_construct() argument
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H A Drv2_clk_mgr.c37 void rv2_clk_mgr_construct(struct dc_context *ctx, struct clk_mgr_internal *clk_mgr, struct pp_smu_funcs *pp_smu) in rv2_clk_mgr_construct() argument
40 rv1_clk_mgr_construct(ctx, clk_mgr, pp_smu); in rv2_clk_mgr_construct()
H A Drv1_clk_mgr.h29 void rv1_clk_mgr_construct(struct dc_context *ctx, struct clk_mgr_internal *clk_mgr, struct pp_smu_funcs *pp_smu);
H A Drv2_clk_mgr.h29 void rv2_clk_mgr_construct(struct dc_context *ctx, struct clk_mgr_internal *clk_mgr, struct pp_smu_funcs *pp_smu);
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/
H A Drv1_clk_mgr.c198 struct pp_smu_funcs_rv *pp_smu = NULL; in rv1_update_clocks() local
205 ASSERT(clk_mgr->pp_smu); in rv1_update_clocks()
210 pp_smu = &clk_mgr->pp_smu->rv_funcs; in rv1_update_clocks()
223 if (pp_smu->set_display_count) in rv1_update_clocks()
224 pp_smu->set_display_count(&pp_smu->pp_smu, display_count); in rv1_update_clocks()
264 if (pp_smu->set_hard_min_fclk_by_freq && in rv1_update_clocks()
265 pp_smu in rv1_update_clocks()
297 struct pp_smu_funcs_rv *pp_smu = NULL; rv1_enable_pme_wa() local
319 rv1_clk_mgr_construct(struct dc_context *ctx, struct clk_mgr_internal *clk_mgr, struct pp_smu_funcs *pp_smu) rv1_clk_mgr_construct() argument
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H A Drv2_clk_mgr.c37 void rv2_clk_mgr_construct(struct dc_context *ctx, struct clk_mgr_internal *clk_mgr, struct pp_smu_funcs *pp_smu) in rv2_clk_mgr_construct() argument
40 rv1_clk_mgr_construct(ctx, clk_mgr, pp_smu); in rv2_clk_mgr_construct()
H A Drv1_clk_mgr.h29 void rv1_clk_mgr_construct(struct dc_context *ctx, struct clk_mgr_internal *clk_mgr, struct pp_smu_funcs *pp_smu);
H A Drv2_clk_mgr.h29 void rv2_clk_mgr_construct(struct dc_context *ctx, struct clk_mgr_internal *clk_mgr, struct pp_smu_funcs *pp_smu);
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/
H A Ddcn20_clk_mgr.c152 struct pp_smu_funcs_nv *pp_smu = NULL; in dcn2_update_clocks() local
176 if (dc->res_pool->pp_smu) in dcn2_update_clocks()
177 pp_smu = &dc->res_pool->pp_smu->nv_funcs; in dcn2_update_clocks()
183 if (pp_smu && pp_smu->set_display_count) in dcn2_update_clocks()
184 pp_smu->set_display_count(&pp_smu->pp_smu, display_count); in dcn2_update_clocks()
193 if (pp_smu in dcn2_update_clocks()
342 struct pp_smu_funcs_nv *pp_smu = NULL; dcn2_enable_pme_wa() local
426 struct pp_smu_funcs_nv *pp_smu = NULL; dcn2_notify_link_rate_change() local
457 dcn20_clk_mgr_construct( struct dc_context *ctx, struct clk_mgr_internal *clk_mgr, struct pp_smu_funcs *pp_smu, struct dccg *dccg) dcn20_clk_mgr_construct() argument
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/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/
H A Ddcn20_clk_mgr.c223 struct pp_smu_funcs_nv *pp_smu = NULL; in dcn2_update_clocks() local
247 if (dc->res_pool->pp_smu) in dcn2_update_clocks()
248 pp_smu = &dc->res_pool->pp_smu->nv_funcs; in dcn2_update_clocks()
254 if (pp_smu && pp_smu->set_display_count) in dcn2_update_clocks()
255 pp_smu->set_display_count(&pp_smu->pp_smu, display_count); in dcn2_update_clocks()
264 if (pp_smu in dcn2_update_clocks()
414 struct pp_smu_funcs_nv *pp_smu = NULL; dcn2_enable_pme_wa() local
497 struct pp_smu_funcs_nv *pp_smu = NULL; dcn2_notify_link_rate_change() local
528 dcn20_clk_mgr_construct( struct dc_context *ctx, struct clk_mgr_internal *clk_mgr, struct pp_smu_funcs *pp_smu, struct dccg *dccg) dcn20_clk_mgr_construct() argument
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/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/clk_mgr/
H A Dclk_mgr.c151 struct clk_mgr *dc_clk_mgr_create(struct dc_context *ctx, struct pp_smu_funcs *pp_smu, struct dccg *dccg) in dc_clk_mgr_create() argument
237 rn_clk_mgr_construct(ctx, clk_mgr, pp_smu, dccg); in dc_clk_mgr_create()
242 rn_clk_mgr_construct(ctx, clk_mgr, pp_smu, dccg); in dc_clk_mgr_create()
246 rv2_clk_mgr_construct(ctx, clk_mgr, pp_smu); in dc_clk_mgr_create()
251 rv1_clk_mgr_construct(ctx, clk_mgr, pp_smu); in dc_clk_mgr_create()
264 dcn3_clk_mgr_construct(ctx, clk_mgr, pp_smu, dccg); in dc_clk_mgr_create()
268 dcn3_clk_mgr_construct(ctx, clk_mgr, pp_smu, dccg); in dc_clk_mgr_create()
272 dcn3_clk_mgr_construct(ctx, clk_mgr, pp_smu, dccg); in dc_clk_mgr_create()
276 dcn201_clk_mgr_construct(ctx, clk_mgr, pp_smu, dccg); in dc_clk_mgr_create()
279 dcn20_clk_mgr_construct(ctx, clk_mgr, pp_smu, dcc in dc_clk_mgr_create()
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/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/clk_mgr/
H A Dclk_mgr.c115 struct clk_mgr *dc_clk_mgr_create(struct dc_context *ctx, struct pp_smu_funcs *pp_smu, struct dccg *dccg) in dc_clk_mgr_create() argument
166 rn_clk_mgr_construct(ctx, clk_mgr, pp_smu, dccg); in dc_clk_mgr_create()
171 rn_clk_mgr_construct(ctx, clk_mgr, pp_smu, dccg); in dc_clk_mgr_create()
175 rv2_clk_mgr_construct(ctx, clk_mgr, pp_smu); in dc_clk_mgr_create()
180 rv1_clk_mgr_construct(ctx, clk_mgr, pp_smu); in dc_clk_mgr_create()
188 dcn3_clk_mgr_construct(ctx, clk_mgr, pp_smu, dccg); in dc_clk_mgr_create()
192 dcn20_clk_mgr_construct(ctx, clk_mgr, pp_smu, dccg); in dc_clk_mgr_create()
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/amdgpu_dm/
H A Damdgpu_dm_pp_smu.c464 static void pp_rv_set_wm_ranges(struct pp_smu *pp, in pp_rv_set_wm_ranges()
513 static void pp_rv_set_pme_wa_enable(struct pp_smu *pp) in pp_rv_set_pme_wa_enable()
521 static void pp_rv_set_active_display_count(struct pp_smu *pp, int count) in pp_rv_set_active_display_count()
529 static void pp_rv_set_min_deep_sleep_dcfclk(struct pp_smu *pp, int clock) in pp_rv_set_min_deep_sleep_dcfclk()
537 static void pp_rv_set_hard_min_dcefclk_by_freq(struct pp_smu *pp, int clock) in pp_rv_set_hard_min_dcefclk_by_freq()
545 static void pp_rv_set_hard_min_fclk_by_freq(struct pp_smu *pp, int mhz) in pp_rv_set_hard_min_fclk_by_freq()
553 static enum pp_smu_status pp_nv_set_wm_ranges(struct pp_smu *pp, in pp_nv_set_wm_ranges()
564 static enum pp_smu_status pp_nv_set_display_count(struct pp_smu *pp, int count) in pp_nv_set_display_count()
581 pp_nv_set_min_deep_sleep_dcfclk(struct pp_smu *pp, int mhz) in pp_nv_set_min_deep_sleep_dcfclk()
598 struct pp_smu *p in pp_nv_set_hard_min_dcefclk_by_freq()
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/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/amdgpu_dm/
H A Damdgpu_dm_pp_smu.c545 void pp_rv_set_wm_ranges(struct pp_smu *pp, in pp_rv_set_wm_ranges()
597 void pp_rv_set_pme_wa_enable(struct pp_smu *pp) in pp_rv_set_pme_wa_enable()
610 void pp_rv_set_active_display_count(struct pp_smu *pp, int count) in pp_rv_set_active_display_count()
623 void pp_rv_set_min_deep_sleep_dcfclk(struct pp_smu *pp, int clock) in pp_rv_set_min_deep_sleep_dcfclk()
636 void pp_rv_set_hard_min_dcefclk_by_freq(struct pp_smu *pp, int clock) in pp_rv_set_hard_min_dcefclk_by_freq()
649 void pp_rv_set_hard_min_fclk_by_freq(struct pp_smu *pp, int mhz) in pp_rv_set_hard_min_fclk_by_freq()
662 static enum pp_smu_status pp_nv_set_wm_ranges(struct pp_smu *pp, in pp_nv_set_wm_ranges()
673 enum pp_smu_status pp_nv_set_pme_wa_enable(struct pp_smu *pp) in pp_nv_set_pme_wa_enable()
689 static enum pp_smu_status pp_nv_set_display_count(struct pp_smu *pp, int count) in pp_nv_set_display_count()
706 pp_nv_set_min_deep_sleep_dcfclk(struct pp_smu *p
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/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/
H A Drn_clk_mgr.c486 struct pp_smu_funcs *pp_smu = clk_mgr->pp_smu; in rn_notify_wm_ranges() local
492 if (pp_smu && pp_smu->rn_funcs.set_wm_ranges) in rn_notify_wm_ranges()
493 pp_smu->rn_funcs.set_wm_ranges(&pp_smu->rn_funcs.pp_smu, &clk_mgr_base->ranges); in rn_notify_wm_ranges()
844 struct pp_smu_funcs *pp_smu, in rn_clk_mgr_construct()
859 clk_mgr->pp_smu = pp_smu; in rn_clk_mgr_construct()
841 rn_clk_mgr_construct( struct dc_context *ctx, struct clk_mgr_internal *clk_mgr, struct pp_smu_funcs *pp_smu, struct dccg *dccg) rn_clk_mgr_construct() argument
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H A Drn_clk_mgr.h38 struct pp_smu_funcs *pp_smu,
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/
H A Drn_clk_mgr.c515 struct pp_smu_funcs *pp_smu = clk_mgr->pp_smu; in rn_notify_wm_ranges() local
521 if (pp_smu && pp_smu->rn_funcs.set_wm_ranges) in rn_notify_wm_ranges()
522 pp_smu->rn_funcs.set_wm_ranges(&pp_smu->rn_funcs.pp_smu, &clk_mgr_base->ranges); in rn_notify_wm_ranges()
701 struct pp_smu_funcs *pp_smu, in rn_clk_mgr_construct()
717 clk_mgr->pp_smu = pp_smu; in rn_clk_mgr_construct()
698 rn_clk_mgr_construct( struct dc_context *ctx, struct clk_mgr_internal *clk_mgr, struct pp_smu_funcs *pp_smu, struct dccg *dccg) rn_clk_mgr_construct() argument
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H A Drn_clk_mgr.h46 struct pp_smu_funcs *pp_smu,
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dcn20/
H A Ddcn20_resource.c1054 static void dcn20_pp_smu_destroy(struct pp_smu_funcs **pp_smu);
1189 if (pool->base.pp_smu != NULL) in dcn20_resource_destruct()
1190 dcn20_pp_smu_destroy(&pool->base.pp_smu); in dcn20_resource_destruct()
2282 struct pp_smu_funcs *pp_smu = kzalloc(sizeof(*pp_smu), GFP_ATOMIC); in dcn20_pp_smu_create() local
2284 if (!pp_smu) in dcn20_pp_smu_create()
2285 return pp_smu; in dcn20_pp_smu_create()
2287 dm_pp_get_funcs(ctx, pp_smu); in dcn20_pp_smu_create()
2289 if (pp_smu->ctx.ver != PP_SMU_VER_NV) in dcn20_pp_smu_create()
2290 pp_smu in dcn20_pp_smu_create()
2295 dcn20_pp_smu_destroy(struct pp_smu_funcs **pp_smu) dcn20_pp_smu_destroy() argument
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/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/dcn21/
H A Ddcn21_resource.c704 static void dcn21_pp_smu_destroy(struct pp_smu_funcs **pp_smu);
1020 if (pool->base.pp_smu != NULL) in dcn21_resource_destruct()
1021 dcn21_pp_smu_destroy(&pool->base.pp_smu); in dcn21_resource_destruct()
1479 static enum pp_smu_status dummy_set_wm_ranges(struct pp_smu *pp, in dummy_set_wm_ranges()
1485 static enum pp_smu_status dummy_get_dpm_clock_table(struct pp_smu *pp, in dummy_get_dpm_clock_table()
1494 struct pp_smu_funcs *pp_smu = kzalloc(sizeof(*pp_smu), GFP_KERNEL); in dcn21_pp_smu_create() local
1496 if (!pp_smu) in dcn21_pp_smu_create()
1497 return pp_smu; in dcn21_pp_smu_create()
1500 pp_smu in dcn21_pp_smu_create()
1514 dcn21_pp_smu_destroy(struct pp_smu_funcs **pp_smu) dcn21_pp_smu_destroy() argument
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/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dcn21/
H A Ddcn21_resource.c481 static void dcn21_pp_smu_destroy(struct pp_smu_funcs **pp_smu);
789 if (pool->base.pp_smu != NULL) in dcn21_resource_destruct()
790 dcn21_pp_smu_destroy(&pool->base.pp_smu); in dcn21_resource_destruct()
1124 struct pp_smu_funcs *pp_smu = kzalloc(sizeof(*pp_smu), GFP_KERNEL); in dcn21_pp_smu_create() local
1126 if (!pp_smu) in dcn21_pp_smu_create()
1127 return pp_smu; in dcn21_pp_smu_create()
1129 dm_pp_get_funcs(ctx, pp_smu); in dcn21_pp_smu_create()
1131 if (pp_smu->ctx.ver != PP_SMU_VER_RN) in dcn21_pp_smu_create()
1132 pp_smu in dcn21_pp_smu_create()
1138 dcn21_pp_smu_destroy(struct pp_smu_funcs **pp_smu) dcn21_pp_smu_destroy() argument
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/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn201/
H A Ddcn201_clk_mgr.h31 struct pp_smu_funcs *pp_smu,
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn30/
H A Ddcn30_clk_mgr.h33 struct pp_smu_funcs *pp_smu,

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