| /kernel/linux/linux-6.6/drivers/gpu/drm/i915/display/ |
| H A D | intel_display_irq.h | 73 void i9xx_pipestat_irq_ack(struct drm_i915_private *i915, u32 iir, u32 pipe_stats[I915_MAX_PIPES]);
75 void i915_pipestat_irq_handler(struct drm_i915_private *i915, u32 iir, u32 pipe_stats[I915_MAX_PIPES]);
76 void i965_pipestat_irq_handler(struct drm_i915_private *i915, u32 iir, u32 pipe_stats[I915_MAX_PIPES]);
77 void valleyview_pipestat_irq_handler(struct drm_i915_private *i915, u32 pipe_stats[I915_MAX_PIPES]);
78 void i8xx_pipestat_irq_handler(struct drm_i915_private *i915, u16 iir, u32 pipe_stats[I915_MAX_PIPES]);
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| H A D | intel_display_irq.c | 412 u32 iir, u32 pipe_stats[I915_MAX_PIPES]) in i9xx_pipestat_irq_ack()
457 pipe_stats[pipe] = intel_uncore_read(&dev_priv->uncore, reg) & status_mask; in i9xx_pipestat_irq_ack()
469 if (pipe_stats[pipe]) { in i9xx_pipestat_irq_ack()
470 intel_uncore_write(&dev_priv->uncore, reg, pipe_stats[pipe]); in i9xx_pipestat_irq_ack()
478 u16 iir, u32 pipe_stats[I915_MAX_PIPES]) in i8xx_pipestat_irq_handler()
483 if (pipe_stats[pipe] & PIPE_VBLANK_INTERRUPT_STATUS) in i8xx_pipestat_irq_handler()
486 if (pipe_stats[pipe] & PIPE_CRC_DONE_INTERRUPT_STATUS) in i8xx_pipestat_irq_handler()
489 if (pipe_stats[pipe] & PIPE_FIFO_UNDERRUN_STATUS) in i8xx_pipestat_irq_handler()
495 u32 iir, u32 pipe_stats[I915_MAX_PIPES]) in i915_pipestat_irq_handler()
501 if (pipe_stats[pip in i915_pipestat_irq_handler()
411 i9xx_pipestat_irq_ack(struct drm_i915_private *dev_priv, u32 iir, u32 pipe_stats[I915_MAX_PIPES]) i9xx_pipestat_irq_ack() argument
477 i8xx_pipestat_irq_handler(struct drm_i915_private *dev_priv, u16 iir, u32 pipe_stats[I915_MAX_PIPES]) i8xx_pipestat_irq_handler() argument
494 i915_pipestat_irq_handler(struct drm_i915_private *dev_priv, u32 iir, u32 pipe_stats[I915_MAX_PIPES]) i915_pipestat_irq_handler() argument
518 i965_pipestat_irq_handler(struct drm_i915_private *dev_priv, u32 iir, u32 pipe_stats[I915_MAX_PIPES]) i965_pipestat_irq_handler() argument
545 valleyview_pipestat_irq_handler(struct drm_i915_private *dev_priv, u32 pipe_stats[I915_MAX_PIPES]) valleyview_pipestat_irq_handler() argument
[all...] |
| /kernel/linux/linux-6.6/drivers/gpu/drm/i915/ |
| H A D | i915_irq.c | 264 u32 pipe_stats[I915_MAX_PIPES] = {}; in valleyview_irq_handler() local
303 i9xx_pipestat_irq_ack(dev_priv, iir, pipe_stats); in valleyview_irq_handler()
327 valleyview_pipestat_irq_handler(dev_priv, pipe_stats); in valleyview_irq_handler()
350 u32 pipe_stats[I915_MAX_PIPES] = {}; in cherryview_irq_handler() local
385 i9xx_pipestat_irq_ack(dev_priv, iir, pipe_stats); in cherryview_irq_handler()
405 valleyview_pipestat_irq_handler(dev_priv, pipe_stats); in cherryview_irq_handler()
1000 u32 pipe_stats[I915_MAX_PIPES] = {}; in i8xx_irq_handler() local
1012 i9xx_pipestat_irq_ack(dev_priv, iir, pipe_stats); in i8xx_irq_handler()
1025 i8xx_pipestat_irq_handler(dev_priv, iir, pipe_stats); in i8xx_irq_handler()
1102 u32 pipe_stats[I915_MAX_PIPE in i915_irq_handler() local
1228 u32 pipe_stats[I915_MAX_PIPES] = {}; i965_irq_handler() local
[all...] |
| /kernel/linux/linux-5.10/drivers/gpu/drm/i915/ |
| H A D | i915_irq.c | 1304 u32 iir, u32 pipe_stats[I915_MAX_PIPES]) in i9xx_pipestat_irq_ack()
1349 pipe_stats[pipe] = I915_READ(reg) & status_mask; in i9xx_pipestat_irq_ack()
1361 if (pipe_stats[pipe]) { in i9xx_pipestat_irq_ack()
1362 I915_WRITE(reg, pipe_stats[pipe]); in i9xx_pipestat_irq_ack()
1370 u16 iir, u32 pipe_stats[I915_MAX_PIPES]) in i8xx_pipestat_irq_handler()
1375 if (pipe_stats[pipe] & PIPE_VBLANK_INTERRUPT_STATUS) in i8xx_pipestat_irq_handler()
1378 if (pipe_stats[pipe] & PIPE_CRC_DONE_INTERRUPT_STATUS) in i8xx_pipestat_irq_handler()
1381 if (pipe_stats[pipe] & PIPE_FIFO_UNDERRUN_STATUS) in i8xx_pipestat_irq_handler()
1387 u32 iir, u32 pipe_stats[I915_MAX_PIPES]) in i915_pipestat_irq_handler()
1393 if (pipe_stats[pip in i915_pipestat_irq_handler()
1303 i9xx_pipestat_irq_ack(struct drm_i915_private *dev_priv, u32 iir, u32 pipe_stats[I915_MAX_PIPES]) i9xx_pipestat_irq_ack() argument
1369 i8xx_pipestat_irq_handler(struct drm_i915_private *dev_priv, u16 iir, u32 pipe_stats[I915_MAX_PIPES]) i8xx_pipestat_irq_handler() argument
1386 i915_pipestat_irq_handler(struct drm_i915_private *dev_priv, u32 iir, u32 pipe_stats[I915_MAX_PIPES]) i915_pipestat_irq_handler() argument
1410 i965_pipestat_irq_handler(struct drm_i915_private *dev_priv, u32 iir, u32 pipe_stats[I915_MAX_PIPES]) i965_pipestat_irq_handler() argument
1437 valleyview_pipestat_irq_handler(struct drm_i915_private *dev_priv, u32 pipe_stats[I915_MAX_PIPES]) valleyview_pipestat_irq_handler() argument
1535 u32 pipe_stats[I915_MAX_PIPES] = {}; valleyview_irq_handler() local
1620 u32 pipe_stats[I915_MAX_PIPES] = {}; cherryview_irq_handler() local
3663 u32 pipe_stats[I915_MAX_PIPES] = {}; i8xx_irq_handler() local
3763 u32 pipe_stats[I915_MAX_PIPES] = {}; i915_irq_handler() local
3906 u32 pipe_stats[I915_MAX_PIPES] = {}; i965_irq_handler() local
[all...] |