Searched refs:phyd32clk (Results 1 - 4 of 4) sorted by relevance
| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dcn31/ |
| H A D | dcn31_dccg.c | 176 enum phyd32clk_clock_source phyd32clk) in dccg31_enable_symclk32_se()
180 phyd32clk = get_phy_mux_symclk(dccg_dcn, phyd32clk); in dccg31_enable_symclk32_se()
190 SYMCLK32_SE0_SRC_SEL, phyd32clk, in dccg31_enable_symclk32_se()
199 SYMCLK32_SE1_SRC_SEL, phyd32clk, in dccg31_enable_symclk32_se()
208 SYMCLK32_SE2_SRC_SEL, phyd32clk, in dccg31_enable_symclk32_se()
217 SYMCLK32_SE3_SRC_SEL, phyd32clk, in dccg31_enable_symclk32_se()
279 enum phyd32clk_clock_source phyd32clk) in dccg31_enable_symclk32_le()
283 phyd32clk = get_phy_mux_symclk(dccg_dcn, phyd32clk); in dccg31_enable_symclk32_le()
173 dccg31_enable_symclk32_se( struct dccg *dccg, int hpo_se_inst, enum phyd32clk_clock_source phyd32clk) dccg31_enable_symclk32_se() argument
276 dccg31_enable_symclk32_le( struct dccg *dccg, int hpo_le_inst, enum phyd32clk_clock_source phyd32clk) dccg31_enable_symclk32_le() argument
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| H A D | dcn31_dccg.h | 167 enum phyd32clk_clock_source phyd32clk);
176 enum phyd32clk_clock_source phyd32clk);
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| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/inc/hw/ |
| H A D | dccg.h | 45 PHYSYMCLK_FORCE_SRC_PHYD32CLK, // Select phyd32clk as the source of clock which is output to PHY through DCIO.
111 enum phyd32clk_clock_source phyd32clk);
120 enum phyd32clk_clock_source phyd32clk);
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| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dcn20/ |
| H A D | dcn20_hwseq.c | 2719 enum phyd32clk_clock_source phyd32clk; in dcn20_enable_stream() local
2734 phyd32clk = get_phyd32clk_src(link); in dcn20_enable_stream()
2735 dccg->funcs->enable_symclk32_se(dccg, dp_hpo_inst, phyd32clk); in dcn20_enable_stream()
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