Searched refs:parent1 (Results 1 - 4 of 4) sorted by relevance
| /kernel/linux/linux-5.10/drivers/gpu/drm/msm/dsi/pll/ |
| H A D | dsi_pll_28nm.c | 511 char clk_name[32], parent1[32], parent2[32], vco_name[32]; in pll_28nm_register() local
532 snprintf(parent1, 32, "dsi%dvco_clk", pll_28nm->id); in pll_28nm_register()
534 parent1, CLK_SET_RATE_PARENT, in pll_28nm_register()
540 snprintf(parent1, 32, "dsi%danalog_postdiv_clk", pll_28nm->id); in pll_28nm_register()
542 parent1, CLK_SET_RATE_PARENT, in pll_28nm_register()
546 snprintf(parent1, 32, "dsi%dvco_clk", pll_28nm->id); in pll_28nm_register()
549 parent1, 0, pll_28nm->mmio + in pll_28nm_register()
554 snprintf(parent1, 32, "dsi%dvco_clk", pll_28nm->id); in pll_28nm_register()
558 parent1, parent2 in pll_28nm_register()
563 snprintf(parent1, 3 in pll_28nm_register()
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| /kernel/linux/linux-5.10/drivers/clk/davinci/ |
| H A D | da8xx-cfgchip.c | 198 const char *parent1; member
241 const char * const parent_names[] = { info->parent0, info->parent1 }; in da8xx_cfgchip_mux_clk_register()
271 .parent1 = "div4.5",
293 .parent1 = "pll1_sysclk2",
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| /kernel/linux/linux-6.6/drivers/clk/davinci/ |
| H A D | da8xx-cfgchip.c | 198 const char *parent1; member
242 const char * const parent_names[] = { info->parent0, info->parent1 }; in da8xx_cfgchip_mux_clk_register()
272 .parent1 = "div4.5",
294 .parent1 = "pll1_sysclk2",
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| /kernel/linux/linux-6.6/drivers/clk/ |
| H A D | clk_test.c | 556 struct clk *parent1, *parent2; in clk_test_multiple_parents_mux_set_range_set_parent_get_rate() local
562 parent1 = clk_hw_get_clk(&ctx->parents_ctx[0].hw, NULL); in clk_test_multiple_parents_mux_set_range_set_parent_get_rate()
563 KUNIT_ASSERT_NOT_ERR_OR_NULL(test, parent1); in clk_test_multiple_parents_mux_set_range_set_parent_get_rate()
564 KUNIT_ASSERT_TRUE(test, clk_is_match(clk_get_parent(clk), parent1)); in clk_test_multiple_parents_mux_set_range_set_parent_get_rate()
569 ret = clk_set_rate(parent1, DUMMY_CLOCK_RATE_1); in clk_test_multiple_parents_mux_set_range_set_parent_get_rate()
589 clk_put(parent1); in clk_test_multiple_parents_mux_set_range_set_parent_get_rate()
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