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Help
Searched
refs:nr_cntr
(Results
1 - 12
of
12
) sorted by relevance
/kernel/linux/linux-5.10/drivers/hwtracing/coresight/
H
A
D
coresight-etm4x-core.c
154
for (i = 0; i < drvdata->
nr_cntr
; i++) {
in etm4_enable_hw()
264
if (!drvdata->
nr_cntr
)
in etm4_config_timestamp_event()
268
for (ctridx = 0; ctridx < drvdata->
nr_cntr
; ctridx++)
in etm4_config_timestamp_event()
273
if (ctridx == drvdata->
nr_cntr
) {
in etm4_config_timestamp_event()
518
for (i = 0; i < drvdata->
nr_cntr
; i++) {
in etm4_disable_hw()
793
drvdata->
nr_cntr
= BMVAL(etmidr5, 28, 30);
in etm4_init_arch_data()
1216
for (i = 0; i < drvdata->
nr_cntr
; i++) {
in etm4_cpu_save()
1328
for (i = 0; i < drvdata->
nr_cntr
; i++) {
in etm4_cpu_restore()
H
A
D
coresight-etm3x-sysfs.c
29
val = drvdata->
nr_cntr
;
in nr_cntr_show()
32
static DEVICE_ATTR_RO(
nr_cntr
);
597
if (val >= drvdata->
nr_cntr
)
in cntr_idx_store()
726
for (i = 0; i < drvdata->
nr_cntr
; i++)
in cntr_val_show()
733
for (i = 0; i < drvdata->
nr_cntr
; i++) {
in cntr_val_show()
H
A
D
coresight-etm3x-core.c
392
for (i = 0; i < drvdata->
nr_cntr
; i++) {
in etm_enable_hw()
576
for (i = 0; i < drvdata->
nr_cntr
; i++)
in etm_disable_hw()
768
drvdata->
nr_cntr
= BMVAL(etmccr, 13, 15);
in etm_init_arch_data()
H
A
D
coresight-etm.h
223
* @
nr_cntr
: Number of counters as found in ETMCCR bit 13-15.
246
u8
nr_cntr
;
member
H
A
D
coresight-etm4x.h
372
* @
nr_cntr
: Number of counters as found in ETMIDR5 bit 28-30.
429
u8
nr_cntr
;
member
H
A
D
coresight-etm4x-sysfs.c
87
val = drvdata->
nr_cntr
;
in nr_cntr_show()
90
static DEVICE_ATTR_RO(
nr_cntr
);
232
for (i = 0; i < drvdata->
nr_cntr
; i++) {
in reset_store()
1522
if (val >= drvdata->
nr_cntr
)
in cntr_idx_store()
/kernel/linux/linux-6.6/drivers/hwtracing/coresight/
H
A
D
coresight-etm4x-core.c
462
for (i = 0; i < drvdata->
nr_cntr
; i++) {
in etm4_enable_hw()
575
if (!drvdata->
nr_cntr
)
in etm4_config_timestamp_event()
579
for (ctridx = 0; ctridx < drvdata->
nr_cntr
; ctridx++)
in etm4_config_timestamp_event()
584
if (ctridx == drvdata->
nr_cntr
) {
in etm4_config_timestamp_event()
917
for (i = 0; i < drvdata->
nr_cntr
; i++) {
in etm4_disable_hw()
1298
drvdata->
nr_cntr
= FIELD_GET(TRCIDR5_NUMCNTR_MASK, etmidr5);
in etm4_init_arch_data()
1717
for (i = 0; i < drvdata->
nr_cntr
; i++) {
in __etm4_cpu_save()
1848
for (i = 0; i < drvdata->
nr_cntr
; i++) {
in __etm4_cpu_restore()
H
A
D
coresight-etm3x-sysfs.c
29
val = drvdata->
nr_cntr
;
in nr_cntr_show()
32
static DEVICE_ATTR_RO(
nr_cntr
);
598
if (val >= drvdata->
nr_cntr
)
in cntr_idx_store()
727
for (i = 0; i < drvdata->
nr_cntr
; i++)
in cntr_val_show()
734
for (i = 0; i < drvdata->
nr_cntr
; i++) {
in cntr_val_show()
H
A
D
coresight-etm3x-core.c
398
for (i = 0; i < drvdata->
nr_cntr
; i++) {
in etm_enable_hw()
599
for (i = 0; i < drvdata->
nr_cntr
; i++)
in etm_disable_hw()
803
drvdata->
nr_cntr
= BMVAL(etmccr, 13, 15);
in etm_init_arch_data()
H
A
D
coresight-etm.h
223
* @
nr_cntr
: Number of counters as found in ETMCCR bit 13-15.
246
u8
nr_cntr
;
member
H
A
D
coresight-etm4x-sysfs.c
88
val = drvdata->
nr_cntr
;
in nr_cntr_show()
91
static DEVICE_ATTR_RO(
nr_cntr
);
233
for (i = 0; i < drvdata->
nr_cntr
; i++) {
in reset_store()
1531
if (val >= drvdata->
nr_cntr
)
in cntr_idx_store()
H
A
D
coresight-etm4x.h
961
* @
nr_cntr
: Number of counters as found in ETMIDR5 bit 28-30.
1025
u8
nr_cntr
;
member
Completed in 23 milliseconds