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Searched refs:msc_dev (Results 1 - 2 of 2) sorted by relevance

/kernel/linux/linux-5.10/drivers/hwtracing/intel_th/
H A D	msu.c	31 #define msc_dev(x) (&(x)->thdev->dev) macro 686 dev_info(msc_dev(msc), "MINTCTL ignores writes: no usable interrupts\n"); in intel_th_msu_init() 746 dev_warn_ratelimited(msc_dev(win->msc), in msc_win_set_lockout() 840 dev_dbg(msc_dev(msc), "MSCnMWP: %08x/%08lx, wrap: %d\n", in msc_disable() 857 dev_dbg(msc_dev(msc), "MSCnNWSA: %08x\n", in msc_disable() 861 dev_dbg(msc_dev(msc), "MSCnSTS: %08x\n", reg); in msc_disable() 934 ret = dma_map_sg(msc_dev(msc)->parent->parent, msc->single_sgt.sgl, 1, in msc_buffer_contig_alloc() 963 dma_unmap_sg(msc_dev(msc)->parent->parent, msc->single_sgt.sgl, in msc_buffer_contig_free() 1005 block = dma_alloc_coherent(msc_dev(win->msc)->parent->parent, in __msc_buffer_win_alloc() 1018 dma_free_coherent(msc_dev(wi in __msc_buffer_win_alloc() [all...]
/kernel/linux/linux-6.6/drivers/hwtracing/intel_th/
H A D	msu.c	31 #define msc_dev(x) (&(x)->thdev->dev) macro 684 dev_info(msc_dev(msc), "MINTCTL ignores writes: no usable interrupts\n"); in intel_th_msu_init() 744 dev_warn_ratelimited(msc_dev(win->msc), in msc_win_set_lockout() 838 dev_dbg(msc_dev(msc), "MSCnMWP: %08x/%08lx, wrap: %d\n", in msc_disable() 855 dev_dbg(msc_dev(msc), "MSCnNWSA: %08x\n", in msc_disable() 859 dev_dbg(msc_dev(msc), "MSCnSTS: %08x\n", reg); in msc_disable() 932 ret = dma_map_sg(msc_dev(msc)->parent->parent, msc->single_sgt.sgl, 1, in msc_buffer_contig_alloc() 961 dma_unmap_sg(msc_dev(msc)->parent->parent, msc->single_sgt.sgl, in msc_buffer_contig_free() 1003 block = dma_alloc_coherent(msc_dev(win->msc)->parent->parent, in __msc_buffer_win_alloc() 1016 dma_free_coherent(msc_dev(wi in __msc_buffer_win_alloc() [all...]

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