Searched refs:mmVCE_LMI_VCPU_CACHE_40BIT_BAR0 (Results 1 - 6 of 6) sorted by relevance
| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/include/asic_reg/vce/ |
| H A D | vce_4_0_offset.h | 162 #define mmVCE_LMI_VCPU_CACHE_40BIT_BAR0 0x1096 macro
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| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/include/asic_reg/vce/ |
| H A D | vce_4_0_offset.h | 162 #define mmVCE_LMI_VCPU_CACHE_40BIT_BAR0 0x1096 macro
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| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/amdgpu/ |
| H A D | vce_v4_0.c | 254 mmVCE_LMI_VCPU_CACHE_40BIT_BAR0), tmr_mc_addr >> 8); in vce_v4_0_sriov_start()
261 mmVCE_LMI_VCPU_CACHE_40BIT_BAR0), in vce_v4_0_sriov_start()
620 WREG32(SOC15_REG_OFFSET(VCE, 0, mmVCE_LMI_VCPU_CACHE_40BIT_BAR0), in vce_v4_0_mc_resume()
626 WREG32(SOC15_REG_OFFSET(VCE, 0, mmVCE_LMI_VCPU_CACHE_40BIT_BAR0), in vce_v4_0_mc_resume()
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| H A D | vce_v3_0.c | 48 #define mmVCE_LMI_VCPU_CACHE_40BIT_BAR0 0x8616 macro
542 WREG32(mmVCE_LMI_VCPU_CACHE_40BIT_BAR0, (adev->vce.gpu_addr >> 8)); in vce_v3_0_mc_resume()
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| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/amdgpu/ |
| H A D | vce_v4_0.c | 255 mmVCE_LMI_VCPU_CACHE_40BIT_BAR0), tmr_mc_addr >> 8); in vce_v4_0_sriov_start()
262 mmVCE_LMI_VCPU_CACHE_40BIT_BAR0), in vce_v4_0_sriov_start()
656 WREG32(SOC15_REG_OFFSET(VCE, 0, mmVCE_LMI_VCPU_CACHE_40BIT_BAR0), in vce_v4_0_mc_resume()
662 WREG32(SOC15_REG_OFFSET(VCE, 0, mmVCE_LMI_VCPU_CACHE_40BIT_BAR0), in vce_v4_0_mc_resume()
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| H A D | vce_v3_0.c | 48 #define mmVCE_LMI_VCPU_CACHE_40BIT_BAR0 0x8616 macro
569 WREG32(mmVCE_LMI_VCPU_CACHE_40BIT_BAR0, (adev->vce.gpu_addr >> 8)); in vce_v3_0_mc_resume()
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