Searched refs:mmCP_MES_IC_OP_CNTL_Sienna_Cichlid (Results 1 - 2 of 2) sorted by relevance
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/amdgpu/ |
H A D | mes_v10_1.c | 34 #define mmCP_MES_IC_OP_CNTL_Sienna_Cichlid 0x2820 macro 500 data = RREG32_SOC15(GC, 0, mmCP_MES_IC_OP_CNTL_Sienna_Cichlid); in mes_v10_1_load_microcode() 510 WREG32_SOC15(GC, 0, mmCP_MES_IC_OP_CNTL_Sienna_Cichlid, data); in mes_v10_1_load_microcode() 520 data = RREG32_SOC15(GC, 0, mmCP_MES_IC_OP_CNTL_Sienna_Cichlid); in mes_v10_1_load_microcode() 529 WREG32_SOC15(GC, 0, mmCP_MES_IC_OP_CNTL_Sienna_Cichlid, data); in mes_v10_1_load_microcode()
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/kernel/linux/linux-6.6/drivers/gpu/drm/amd/amdgpu/ |
H A D | mes_v10_1.c | 35 #define mmCP_MES_IC_OP_CNTL_Sienna_Cichlid 0x2820 macro 563 data = RREG32_SOC15(GC, 0, mmCP_MES_IC_OP_CNTL_Sienna_Cichlid); in mes_v10_1_load_microcode() 573 WREG32_SOC15(GC, 0, mmCP_MES_IC_OP_CNTL_Sienna_Cichlid, data); in mes_v10_1_load_microcode() 583 data = RREG32_SOC15(GC, 0, mmCP_MES_IC_OP_CNTL_Sienna_Cichlid); in mes_v10_1_load_microcode() 592 WREG32_SOC15(GC, 0, mmCP_MES_IC_OP_CNTL_Sienna_Cichlid, data); in mes_v10_1_load_microcode()
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